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path: root/drivers/gpu/drm/omapdrm/dss/dispc.c
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Diffstat (limited to 'drivers/gpu/drm/omapdrm/dss/dispc.c')
-rw-r--r--drivers/gpu/drm/omapdrm/dss/dispc.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c
index 83b7a7a2a9e7..63d3dc44913c 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -2870,7 +2870,8 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi,
2870 int wbdelay; 2870 int wbdelay;
2871 2871
2872 wbdelay = min(mgr_timings->vfront_porch + 2872 wbdelay = min(mgr_timings->vfront_porch +
2873 mgr_timings->vsync_len + mgr_timings->vback_porch, 255); 2873 mgr_timings->vsync_len + mgr_timings->vback_porch,
2874 (u32)255);
2874 2875
2875 /* WBDELAYCOUNT */ 2876 /* WBDELAYCOUNT */
2876 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), wbdelay, 7, 0); 2877 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), wbdelay, 7, 0);
@@ -3242,7 +3243,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
3242 ht = timings->pixelclock / xtot; 3243 ht = timings->pixelclock / xtot;
3243 vt = timings->pixelclock / xtot / ytot; 3244 vt = timings->pixelclock / xtot / ytot;
3244 3245
3245 DSSDBG("pck %u\n", timings->pixelclock); 3246 DSSDBG("pck %lu\n", timings->pixelclock);
3246 DSSDBG("hsync_len %d hfp %d hbp %d vsw %d vfp %d vbp %d\n", 3247 DSSDBG("hsync_len %d hfp %d hbp %d vsw %d vfp %d vbp %d\n",
3247 t.hsync_len, t.hfront_porch, t.hback_porch, 3248 t.hsync_len, t.hfront_porch, t.hback_porch,
3248 t.vsync_len, t.vfront_porch, t.vback_porch); 3249 t.vsync_len, t.vfront_porch, t.vback_porch);