diff options
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/dsi.h')
-rw-r--r-- | drivers/gpu/drm/msm/dsi/dsi.h | 51 |
1 files changed, 41 insertions, 10 deletions
diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h index 03f115f532c2..32369975d155 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.h +++ b/drivers/gpu/drm/msm/dsi/dsi.h | |||
@@ -27,14 +27,24 @@ | |||
27 | #define DSI_1 1 | 27 | #define DSI_1 1 |
28 | #define DSI_MAX 2 | 28 | #define DSI_MAX 2 |
29 | 29 | ||
30 | struct msm_dsi_phy_shared_timings; | ||
31 | struct msm_dsi_phy_clk_request; | ||
32 | |||
30 | enum msm_dsi_phy_type { | 33 | enum msm_dsi_phy_type { |
31 | MSM_DSI_PHY_28NM_HPM, | 34 | MSM_DSI_PHY_28NM_HPM, |
32 | MSM_DSI_PHY_28NM_LP, | 35 | MSM_DSI_PHY_28NM_LP, |
33 | MSM_DSI_PHY_20NM, | 36 | MSM_DSI_PHY_20NM, |
34 | MSM_DSI_PHY_28NM_8960, | 37 | MSM_DSI_PHY_28NM_8960, |
38 | MSM_DSI_PHY_14NM, | ||
35 | MSM_DSI_PHY_MAX | 39 | MSM_DSI_PHY_MAX |
36 | }; | 40 | }; |
37 | 41 | ||
42 | enum msm_dsi_phy_usecase { | ||
43 | MSM_DSI_PHY_STANDALONE, | ||
44 | MSM_DSI_PHY_MASTER, | ||
45 | MSM_DSI_PHY_SLAVE, | ||
46 | }; | ||
47 | |||
38 | #define DSI_DEV_REGULATOR_MAX 8 | 48 | #define DSI_DEV_REGULATOR_MAX 8 |
39 | #define DSI_BUS_CLK_MAX 4 | 49 | #define DSI_BUS_CLK_MAX 4 |
40 | 50 | ||
@@ -73,8 +83,8 @@ struct msm_dsi { | |||
73 | struct device *phy_dev; | 83 | struct device *phy_dev; |
74 | bool phy_enabled; | 84 | bool phy_enabled; |
75 | 85 | ||
76 | /* the encoders we are hooked to (outside of dsi block) */ | 86 | /* the encoder we are hooked to (outside of dsi block) */ |
77 | struct drm_encoder *encoders[MSM_DSI_ENCODER_NUM]; | 87 | struct drm_encoder *encoder; |
78 | 88 | ||
79 | int id; | 89 | int id; |
80 | }; | 90 | }; |
@@ -84,12 +94,9 @@ struct drm_bridge *msm_dsi_manager_bridge_init(u8 id); | |||
84 | void msm_dsi_manager_bridge_destroy(struct drm_bridge *bridge); | 94 | void msm_dsi_manager_bridge_destroy(struct drm_bridge *bridge); |
85 | struct drm_connector *msm_dsi_manager_connector_init(u8 id); | 95 | struct drm_connector *msm_dsi_manager_connector_init(u8 id); |
86 | struct drm_connector *msm_dsi_manager_ext_bridge_init(u8 id); | 96 | struct drm_connector *msm_dsi_manager_ext_bridge_init(u8 id); |
87 | int msm_dsi_manager_phy_enable(int id, | ||
88 | const unsigned long bit_rate, const unsigned long esc_rate, | ||
89 | u32 *clk_pre, u32 *clk_post); | ||
90 | void msm_dsi_manager_phy_disable(int id); | ||
91 | int msm_dsi_manager_cmd_xfer(int id, const struct mipi_dsi_msg *msg); | 97 | int msm_dsi_manager_cmd_xfer(int id, const struct mipi_dsi_msg *msg); |
92 | bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len); | 98 | bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len); |
99 | void msm_dsi_manager_attach_dsi_device(int id, u32 device_flags); | ||
93 | int msm_dsi_manager_register(struct msm_dsi *msm_dsi); | 100 | int msm_dsi_manager_register(struct msm_dsi *msm_dsi); |
94 | void msm_dsi_manager_unregister(struct msm_dsi *msm_dsi); | 101 | void msm_dsi_manager_unregister(struct msm_dsi *msm_dsi); |
95 | 102 | ||
@@ -111,6 +118,8 @@ int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll, | |||
111 | struct clk **byte_clk_provider, struct clk **pixel_clk_provider); | 118 | struct clk **byte_clk_provider, struct clk **pixel_clk_provider); |
112 | void msm_dsi_pll_save_state(struct msm_dsi_pll *pll); | 119 | void msm_dsi_pll_save_state(struct msm_dsi_pll *pll); |
113 | int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll); | 120 | int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll); |
121 | int msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll, | ||
122 | enum msm_dsi_phy_usecase uc); | ||
114 | #else | 123 | #else |
115 | static inline struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev, | 124 | static inline struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev, |
116 | enum msm_dsi_phy_type type, int id) { | 125 | enum msm_dsi_phy_type type, int id) { |
@@ -131,6 +140,11 @@ static inline int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll) | |||
131 | { | 140 | { |
132 | return 0; | 141 | return 0; |
133 | } | 142 | } |
143 | static inline int msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll, | ||
144 | enum msm_dsi_phy_usecase uc) | ||
145 | { | ||
146 | return -ENODEV; | ||
147 | } | ||
134 | #endif | 148 | #endif |
135 | 149 | ||
136 | /* dsi host */ | 150 | /* dsi host */ |
@@ -146,7 +160,8 @@ void msm_dsi_host_cmd_xfer_commit(struct mipi_dsi_host *host, | |||
146 | u32 dma_base, u32 len); | 160 | u32 dma_base, u32 len); |
147 | int msm_dsi_host_enable(struct mipi_dsi_host *host); | 161 | int msm_dsi_host_enable(struct mipi_dsi_host *host); |
148 | int msm_dsi_host_disable(struct mipi_dsi_host *host); | 162 | int msm_dsi_host_disable(struct mipi_dsi_host *host); |
149 | int msm_dsi_host_power_on(struct mipi_dsi_host *host); | 163 | int msm_dsi_host_power_on(struct mipi_dsi_host *host, |
164 | struct msm_dsi_phy_shared_timings *phy_shared_timings); | ||
150 | int msm_dsi_host_power_off(struct mipi_dsi_host *host); | 165 | int msm_dsi_host_power_off(struct mipi_dsi_host *host); |
151 | int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host, | 166 | int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host, |
152 | struct drm_display_mode *mode); | 167 | struct drm_display_mode *mode); |
@@ -157,6 +172,9 @@ int msm_dsi_host_register(struct mipi_dsi_host *host, bool check_defer); | |||
157 | void msm_dsi_host_unregister(struct mipi_dsi_host *host); | 172 | void msm_dsi_host_unregister(struct mipi_dsi_host *host); |
158 | int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host, | 173 | int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host, |
159 | struct msm_dsi_pll *src_pll); | 174 | struct msm_dsi_pll *src_pll); |
175 | void msm_dsi_host_reset_phy(struct mipi_dsi_host *host); | ||
176 | void msm_dsi_host_get_phy_clk_req(struct mipi_dsi_host *host, | ||
177 | struct msm_dsi_phy_clk_request *clk_req); | ||
160 | void msm_dsi_host_destroy(struct mipi_dsi_host *host); | 178 | void msm_dsi_host_destroy(struct mipi_dsi_host *host); |
161 | int msm_dsi_host_modeset_init(struct mipi_dsi_host *host, | 179 | int msm_dsi_host_modeset_init(struct mipi_dsi_host *host, |
162 | struct drm_device *dev); | 180 | struct drm_device *dev); |
@@ -164,14 +182,27 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi); | |||
164 | 182 | ||
165 | /* dsi phy */ | 183 | /* dsi phy */ |
166 | struct msm_dsi_phy; | 184 | struct msm_dsi_phy; |
185 | struct msm_dsi_phy_shared_timings { | ||
186 | u32 clk_post; | ||
187 | u32 clk_pre; | ||
188 | bool clk_pre_inc_by_2; | ||
189 | }; | ||
190 | |||
191 | struct msm_dsi_phy_clk_request { | ||
192 | unsigned long bitclk_rate; | ||
193 | unsigned long escclk_rate; | ||
194 | }; | ||
195 | |||
167 | void msm_dsi_phy_driver_register(void); | 196 | void msm_dsi_phy_driver_register(void); |
168 | void msm_dsi_phy_driver_unregister(void); | 197 | void msm_dsi_phy_driver_unregister(void); |
169 | int msm_dsi_phy_enable(struct msm_dsi_phy *phy, int src_pll_id, | 198 | int msm_dsi_phy_enable(struct msm_dsi_phy *phy, int src_pll_id, |
170 | const unsigned long bit_rate, const unsigned long esc_rate); | 199 | struct msm_dsi_phy_clk_request *clk_req); |
171 | void msm_dsi_phy_disable(struct msm_dsi_phy *phy); | 200 | void msm_dsi_phy_disable(struct msm_dsi_phy *phy); |
172 | void msm_dsi_phy_get_clk_pre_post(struct msm_dsi_phy *phy, | 201 | void msm_dsi_phy_get_shared_timings(struct msm_dsi_phy *phy, |
173 | u32 *clk_pre, u32 *clk_post); | 202 | struct msm_dsi_phy_shared_timings *shared_timing); |
174 | struct msm_dsi_pll *msm_dsi_phy_get_pll(struct msm_dsi_phy *phy); | 203 | struct msm_dsi_pll *msm_dsi_phy_get_pll(struct msm_dsi_phy *phy); |
204 | void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy, | ||
205 | enum msm_dsi_phy_usecase uc); | ||
175 | 206 | ||
176 | #endif /* __DSI_CONNECTOR_H__ */ | 207 | #endif /* __DSI_CONNECTOR_H__ */ |
177 | 208 | ||