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path: root/drivers/gpu/drm/msm/dsi/dsi.h
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Diffstat (limited to 'drivers/gpu/drm/msm/dsi/dsi.h')
-rw-r--r--drivers/gpu/drm/msm/dsi/dsi.h51
1 files changed, 41 insertions, 10 deletions
diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h
index 03f115f532c2..32369975d155 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.h
+++ b/drivers/gpu/drm/msm/dsi/dsi.h
@@ -27,14 +27,24 @@
27#define DSI_1 1 27#define DSI_1 1
28#define DSI_MAX 2 28#define DSI_MAX 2
29 29
30struct msm_dsi_phy_shared_timings;
31struct msm_dsi_phy_clk_request;
32
30enum msm_dsi_phy_type { 33enum msm_dsi_phy_type {
31 MSM_DSI_PHY_28NM_HPM, 34 MSM_DSI_PHY_28NM_HPM,
32 MSM_DSI_PHY_28NM_LP, 35 MSM_DSI_PHY_28NM_LP,
33 MSM_DSI_PHY_20NM, 36 MSM_DSI_PHY_20NM,
34 MSM_DSI_PHY_28NM_8960, 37 MSM_DSI_PHY_28NM_8960,
38 MSM_DSI_PHY_14NM,
35 MSM_DSI_PHY_MAX 39 MSM_DSI_PHY_MAX
36}; 40};
37 41
42enum msm_dsi_phy_usecase {
43 MSM_DSI_PHY_STANDALONE,
44 MSM_DSI_PHY_MASTER,
45 MSM_DSI_PHY_SLAVE,
46};
47
38#define DSI_DEV_REGULATOR_MAX 8 48#define DSI_DEV_REGULATOR_MAX 8
39#define DSI_BUS_CLK_MAX 4 49#define DSI_BUS_CLK_MAX 4
40 50
@@ -73,8 +83,8 @@ struct msm_dsi {
73 struct device *phy_dev; 83 struct device *phy_dev;
74 bool phy_enabled; 84 bool phy_enabled;
75 85
76 /* the encoders we are hooked to (outside of dsi block) */ 86 /* the encoder we are hooked to (outside of dsi block) */
77 struct drm_encoder *encoders[MSM_DSI_ENCODER_NUM]; 87 struct drm_encoder *encoder;
78 88
79 int id; 89 int id;
80}; 90};
@@ -84,12 +94,9 @@ struct drm_bridge *msm_dsi_manager_bridge_init(u8 id);
84void msm_dsi_manager_bridge_destroy(struct drm_bridge *bridge); 94void msm_dsi_manager_bridge_destroy(struct drm_bridge *bridge);
85struct drm_connector *msm_dsi_manager_connector_init(u8 id); 95struct drm_connector *msm_dsi_manager_connector_init(u8 id);
86struct drm_connector *msm_dsi_manager_ext_bridge_init(u8 id); 96struct drm_connector *msm_dsi_manager_ext_bridge_init(u8 id);
87int msm_dsi_manager_phy_enable(int id,
88 const unsigned long bit_rate, const unsigned long esc_rate,
89 u32 *clk_pre, u32 *clk_post);
90void msm_dsi_manager_phy_disable(int id);
91int msm_dsi_manager_cmd_xfer(int id, const struct mipi_dsi_msg *msg); 97int msm_dsi_manager_cmd_xfer(int id, const struct mipi_dsi_msg *msg);
92bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len); 98bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len);
99void msm_dsi_manager_attach_dsi_device(int id, u32 device_flags);
93int msm_dsi_manager_register(struct msm_dsi *msm_dsi); 100int msm_dsi_manager_register(struct msm_dsi *msm_dsi);
94void msm_dsi_manager_unregister(struct msm_dsi *msm_dsi); 101void msm_dsi_manager_unregister(struct msm_dsi *msm_dsi);
95 102
@@ -111,6 +118,8 @@ int msm_dsi_pll_get_clk_provider(struct msm_dsi_pll *pll,
111 struct clk **byte_clk_provider, struct clk **pixel_clk_provider); 118 struct clk **byte_clk_provider, struct clk **pixel_clk_provider);
112void msm_dsi_pll_save_state(struct msm_dsi_pll *pll); 119void msm_dsi_pll_save_state(struct msm_dsi_pll *pll);
113int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll); 120int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll);
121int msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll,
122 enum msm_dsi_phy_usecase uc);
114#else 123#else
115static inline struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev, 124static inline struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev,
116 enum msm_dsi_phy_type type, int id) { 125 enum msm_dsi_phy_type type, int id) {
@@ -131,6 +140,11 @@ static inline int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll)
131{ 140{
132 return 0; 141 return 0;
133} 142}
143static inline int msm_dsi_pll_set_usecase(struct msm_dsi_pll *pll,
144 enum msm_dsi_phy_usecase uc)
145{
146 return -ENODEV;
147}
134#endif 148#endif
135 149
136/* dsi host */ 150/* dsi host */
@@ -146,7 +160,8 @@ void msm_dsi_host_cmd_xfer_commit(struct mipi_dsi_host *host,
146 u32 dma_base, u32 len); 160 u32 dma_base, u32 len);
147int msm_dsi_host_enable(struct mipi_dsi_host *host); 161int msm_dsi_host_enable(struct mipi_dsi_host *host);
148int msm_dsi_host_disable(struct mipi_dsi_host *host); 162int msm_dsi_host_disable(struct mipi_dsi_host *host);
149int msm_dsi_host_power_on(struct mipi_dsi_host *host); 163int msm_dsi_host_power_on(struct mipi_dsi_host *host,
164 struct msm_dsi_phy_shared_timings *phy_shared_timings);
150int msm_dsi_host_power_off(struct mipi_dsi_host *host); 165int msm_dsi_host_power_off(struct mipi_dsi_host *host);
151int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host, 166int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host,
152 struct drm_display_mode *mode); 167 struct drm_display_mode *mode);
@@ -157,6 +172,9 @@ int msm_dsi_host_register(struct mipi_dsi_host *host, bool check_defer);
157void msm_dsi_host_unregister(struct mipi_dsi_host *host); 172void msm_dsi_host_unregister(struct mipi_dsi_host *host);
158int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host, 173int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host,
159 struct msm_dsi_pll *src_pll); 174 struct msm_dsi_pll *src_pll);
175void msm_dsi_host_reset_phy(struct mipi_dsi_host *host);
176void msm_dsi_host_get_phy_clk_req(struct mipi_dsi_host *host,
177 struct msm_dsi_phy_clk_request *clk_req);
160void msm_dsi_host_destroy(struct mipi_dsi_host *host); 178void msm_dsi_host_destroy(struct mipi_dsi_host *host);
161int msm_dsi_host_modeset_init(struct mipi_dsi_host *host, 179int msm_dsi_host_modeset_init(struct mipi_dsi_host *host,
162 struct drm_device *dev); 180 struct drm_device *dev);
@@ -164,14 +182,27 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi);
164 182
165/* dsi phy */ 183/* dsi phy */
166struct msm_dsi_phy; 184struct msm_dsi_phy;
185struct msm_dsi_phy_shared_timings {
186 u32 clk_post;
187 u32 clk_pre;
188 bool clk_pre_inc_by_2;
189};
190
191struct msm_dsi_phy_clk_request {
192 unsigned long bitclk_rate;
193 unsigned long escclk_rate;
194};
195
167void msm_dsi_phy_driver_register(void); 196void msm_dsi_phy_driver_register(void);
168void msm_dsi_phy_driver_unregister(void); 197void msm_dsi_phy_driver_unregister(void);
169int msm_dsi_phy_enable(struct msm_dsi_phy *phy, int src_pll_id, 198int msm_dsi_phy_enable(struct msm_dsi_phy *phy, int src_pll_id,
170 const unsigned long bit_rate, const unsigned long esc_rate); 199 struct msm_dsi_phy_clk_request *clk_req);
171void msm_dsi_phy_disable(struct msm_dsi_phy *phy); 200void msm_dsi_phy_disable(struct msm_dsi_phy *phy);
172void msm_dsi_phy_get_clk_pre_post(struct msm_dsi_phy *phy, 201void msm_dsi_phy_get_shared_timings(struct msm_dsi_phy *phy,
173 u32 *clk_pre, u32 *clk_post); 202 struct msm_dsi_phy_shared_timings *shared_timing);
174struct msm_dsi_pll *msm_dsi_phy_get_pll(struct msm_dsi_phy *phy); 203struct msm_dsi_pll *msm_dsi_phy_get_pll(struct msm_dsi_phy *phy);
204void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy,
205 enum msm_dsi_phy_usecase uc);
175 206
176#endif /* __DSI_CONNECTOR_H__ */ 207#endif /* __DSI_CONNECTOR_H__ */
177 208