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path: root/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
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Diffstat (limited to 'drivers/gpu/drm/mediatek/mtk_drm_crtc.c')
-rw-r--r--drivers/gpu/drm/mediatek/mtk_drm_crtc.c47
1 files changed, 27 insertions, 20 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
index 2d6aa150a9ff..0b976dfd04df 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
@@ -45,7 +45,8 @@ struct mtk_drm_crtc {
45 bool pending_needs_vblank; 45 bool pending_needs_vblank;
46 struct drm_pending_vblank_event *event; 46 struct drm_pending_vblank_event *event;
47 47
48 struct drm_plane planes[OVL_LAYER_NR]; 48 struct drm_plane *planes;
49 unsigned int layer_nr;
49 bool pending_planes; 50 bool pending_planes;
50 51
51 void __iomem *config_regs; 52 void __iomem *config_regs;
@@ -171,9 +172,9 @@ static void mtk_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)
171static int mtk_drm_crtc_enable_vblank(struct drm_crtc *crtc) 172static int mtk_drm_crtc_enable_vblank(struct drm_crtc *crtc)
172{ 173{
173 struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc); 174 struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
174 struct mtk_ddp_comp *ovl = mtk_crtc->ddp_comp[0]; 175 struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];
175 176
176 mtk_ddp_comp_enable_vblank(ovl, &mtk_crtc->base); 177 mtk_ddp_comp_enable_vblank(comp, &mtk_crtc->base);
177 178
178 return 0; 179 return 0;
179} 180}
@@ -181,9 +182,9 @@ static int mtk_drm_crtc_enable_vblank(struct drm_crtc *crtc)
181static void mtk_drm_crtc_disable_vblank(struct drm_crtc *crtc) 182static void mtk_drm_crtc_disable_vblank(struct drm_crtc *crtc)
182{ 183{
183 struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc); 184 struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
184 struct mtk_ddp_comp *ovl = mtk_crtc->ddp_comp[0]; 185 struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];
185 186
186 mtk_ddp_comp_disable_vblank(ovl); 187 mtk_ddp_comp_disable_vblank(comp);
187} 188}
188 189
189static int mtk_crtc_ddp_clk_enable(struct mtk_drm_crtc *mtk_crtc) 190static int mtk_crtc_ddp_clk_enable(struct mtk_drm_crtc *mtk_crtc)
@@ -286,7 +287,7 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc)
286 } 287 }
287 288
288 /* Initially configure all planes */ 289 /* Initially configure all planes */
289 for (i = 0; i < OVL_LAYER_NR; i++) { 290 for (i = 0; i < mtk_crtc->layer_nr; i++) {
290 struct drm_plane *plane = &mtk_crtc->planes[i]; 291 struct drm_plane *plane = &mtk_crtc->planes[i];
291 struct mtk_plane_state *plane_state; 292 struct mtk_plane_state *plane_state;
292 293
@@ -334,7 +335,7 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc)
334{ 335{
335 struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc); 336 struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
336 struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state); 337 struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state);
337 struct mtk_ddp_comp *ovl = mtk_crtc->ddp_comp[0]; 338 struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];
338 unsigned int i; 339 unsigned int i;
339 340
340 /* 341 /*
@@ -343,7 +344,7 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc)
343 * queue update module registers on vblank. 344 * queue update module registers on vblank.
344 */ 345 */
345 if (state->pending_config) { 346 if (state->pending_config) {
346 mtk_ddp_comp_config(ovl, state->pending_width, 347 mtk_ddp_comp_config(comp, state->pending_width,
347 state->pending_height, 348 state->pending_height,
348 state->pending_vrefresh, 0); 349 state->pending_vrefresh, 0);
349 350
@@ -351,14 +352,14 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc)
351 } 352 }
352 353
353 if (mtk_crtc->pending_planes) { 354 if (mtk_crtc->pending_planes) {
354 for (i = 0; i < OVL_LAYER_NR; i++) { 355 for (i = 0; i < mtk_crtc->layer_nr; i++) {
355 struct drm_plane *plane = &mtk_crtc->planes[i]; 356 struct drm_plane *plane = &mtk_crtc->planes[i];
356 struct mtk_plane_state *plane_state; 357 struct mtk_plane_state *plane_state;
357 358
358 plane_state = to_mtk_plane_state(plane->state); 359 plane_state = to_mtk_plane_state(plane->state);
359 360
360 if (plane_state->pending.config) { 361 if (plane_state->pending.config) {
361 mtk_ddp_comp_layer_config(ovl, i, plane_state); 362 mtk_ddp_comp_layer_config(comp, i, plane_state);
362 plane_state->pending.config = false; 363 plane_state->pending.config = false;
363 } 364 }
364 } 365 }
@@ -370,12 +371,12 @@ static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc,
370 struct drm_crtc_state *old_state) 371 struct drm_crtc_state *old_state)
371{ 372{
372 struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc); 373 struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
373 struct mtk_ddp_comp *ovl = mtk_crtc->ddp_comp[0]; 374 struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];
374 int ret; 375 int ret;
375 376
376 DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id); 377 DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id);
377 378
378 ret = mtk_smi_larb_get(ovl->larb_dev); 379 ret = mtk_smi_larb_get(comp->larb_dev);
379 if (ret) { 380 if (ret) {
380 DRM_ERROR("Failed to get larb: %d\n", ret); 381 DRM_ERROR("Failed to get larb: %d\n", ret);
381 return; 382 return;
@@ -383,7 +384,7 @@ static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc,
383 384
384 ret = mtk_crtc_ddp_hw_init(mtk_crtc); 385 ret = mtk_crtc_ddp_hw_init(mtk_crtc);
385 if (ret) { 386 if (ret) {
386 mtk_smi_larb_put(ovl->larb_dev); 387 mtk_smi_larb_put(comp->larb_dev);
387 return; 388 return;
388 } 389 }
389 390
@@ -395,7 +396,7 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc *crtc,
395 struct drm_crtc_state *old_state) 396 struct drm_crtc_state *old_state)
396{ 397{
397 struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc); 398 struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
398 struct mtk_ddp_comp *ovl = mtk_crtc->ddp_comp[0]; 399 struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];
399 int i; 400 int i;
400 401
401 DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id); 402 DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id);
@@ -403,7 +404,7 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc *crtc,
403 return; 404 return;
404 405
405 /* Set all pending plane state to disabled */ 406 /* Set all pending plane state to disabled */
406 for (i = 0; i < OVL_LAYER_NR; i++) { 407 for (i = 0; i < mtk_crtc->layer_nr; i++) {
407 struct drm_plane *plane = &mtk_crtc->planes[i]; 408 struct drm_plane *plane = &mtk_crtc->planes[i];
408 struct mtk_plane_state *plane_state; 409 struct mtk_plane_state *plane_state;
409 410
@@ -418,7 +419,7 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc *crtc,
418 419
419 drm_crtc_vblank_off(crtc); 420 drm_crtc_vblank_off(crtc);
420 mtk_crtc_ddp_hw_fini(mtk_crtc); 421 mtk_crtc_ddp_hw_fini(mtk_crtc);
421 mtk_smi_larb_put(ovl->larb_dev); 422 mtk_smi_larb_put(comp->larb_dev);
422 423
423 mtk_crtc->enabled = false; 424 mtk_crtc->enabled = false;
424} 425}
@@ -450,7 +451,7 @@ static void mtk_drm_crtc_atomic_flush(struct drm_crtc *crtc,
450 451
451 if (mtk_crtc->event) 452 if (mtk_crtc->event)
452 mtk_crtc->pending_needs_vblank = true; 453 mtk_crtc->pending_needs_vblank = true;
453 for (i = 0; i < OVL_LAYER_NR; i++) { 454 for (i = 0; i < mtk_crtc->layer_nr; i++) {
454 struct drm_plane *plane = &mtk_crtc->planes[i]; 455 struct drm_plane *plane = &mtk_crtc->planes[i];
455 struct mtk_plane_state *plane_state; 456 struct mtk_plane_state *plane_state;
456 457
@@ -516,7 +517,7 @@ err_cleanup_crtc:
516 return ret; 517 return ret;
517} 518}
518 519
519void mtk_crtc_ddp_irq(struct drm_crtc *crtc, struct mtk_ddp_comp *ovl) 520void mtk_crtc_ddp_irq(struct drm_crtc *crtc, struct mtk_ddp_comp *comp)
520{ 521{
521 struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc); 522 struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
522 struct mtk_drm_private *priv = crtc->dev->dev_private; 523 struct mtk_drm_private *priv = crtc->dev->dev_private;
@@ -598,7 +599,12 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
598 mtk_crtc->ddp_comp[i] = comp; 599 mtk_crtc->ddp_comp[i] = comp;
599 } 600 }
600 601
601 for (zpos = 0; zpos < OVL_LAYER_NR; zpos++) { 602 mtk_crtc->layer_nr = mtk_ddp_comp_layer_nr(mtk_crtc->ddp_comp[0]);
603 mtk_crtc->planes = devm_kzalloc(dev, mtk_crtc->layer_nr *
604 sizeof(struct drm_plane),
605 GFP_KERNEL);
606
607 for (zpos = 0; zpos < mtk_crtc->layer_nr; zpos++) {
602 type = (zpos == 0) ? DRM_PLANE_TYPE_PRIMARY : 608 type = (zpos == 0) ? DRM_PLANE_TYPE_PRIMARY :
603 (zpos == 1) ? DRM_PLANE_TYPE_CURSOR : 609 (zpos == 1) ? DRM_PLANE_TYPE_CURSOR :
604 DRM_PLANE_TYPE_OVERLAY; 610 DRM_PLANE_TYPE_OVERLAY;
@@ -609,7 +615,8 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
609 } 615 }
610 616
611 ret = mtk_drm_crtc_init(drm_dev, mtk_crtc, &mtk_crtc->planes[0], 617 ret = mtk_drm_crtc_init(drm_dev, mtk_crtc, &mtk_crtc->planes[0],
612 &mtk_crtc->planes[1], pipe); 618 mtk_crtc->layer_nr > 1 ? &mtk_crtc->planes[1] :
619 NULL, pipe);
613 if (ret < 0) 620 if (ret < 0)
614 goto unprepare; 621 goto unprepare;
615 drm_mode_crtc_set_gamma_size(&mtk_crtc->base, MTK_LUT_SIZE); 622 drm_mode_crtc_set_gamma_size(&mtk_crtc->base, MTK_LUT_SIZE);