1 files changed, 31 insertions, 12 deletions

diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_coherency.c b/drivers/gpu/drm/i915/selftests/i915_gem_coherency.c
index a4900091ae3d..3a095c37c120 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_coherency.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_coherency.c
@@ -42,11 +42,21 @@ static int cpu_set(struct drm_i915_gem_object *obj,
 
         page = i915_gem_object_get_page(obj, offset >> PAGE_SHIFT);
         map = kmap_atomic(page);
-        if (needs_clflush & CLFLUSH_BEFORE)
+
+        if (needs_clflush & CLFLUSH_BEFORE) {
+                mb();
                 clflush(map+offset_in_page(offset) / sizeof(*map));
+                mb();
+        }
+
         map[offset_in_page(offset) / sizeof(*map)] = v;
-        if (needs_clflush & CLFLUSH_AFTER)
+
+        if (needs_clflush & CLFLUSH_AFTER) {
+                mb();
                 clflush(map+offset_in_page(offset) / sizeof(*map));
+                mb();
+        }
+
         kunmap_atomic(map);
 
         i915_gem_obj_finish_shmem_access(obj);
@@ -68,8 +78,13 @@ static int cpu_get(struct drm_i915_gem_object *obj,
 
         page = i915_gem_object_get_page(obj, offset >> PAGE_SHIFT);
         map = kmap_atomic(page);
-        if (needs_clflush & CLFLUSH_BEFORE)
+
+        if (needs_clflush & CLFLUSH_BEFORE) {
+                mb();
                 clflush(map+offset_in_page(offset) / sizeof(*map));
+                mb();
+        }
+
         *v = map[offset_in_page(offset) / sizeof(*map)];
         kunmap_atomic(map);
 
@@ -210,28 +225,24 @@ static int gpu_set(struct drm_i915_gem_object *obj,
                 *cs++ = upper_32_bits(i915_ggtt_offset(vma) + offset);
                 *cs++ = v;
         } else if (INTEL_GEN(i915) >= 4) {
-                *cs++ = MI_STORE_DWORD_IMM_GEN4 | 1 << 22;
+                *cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
                 *cs++ = 0;
                 *cs++ = i915_ggtt_offset(vma) + offset;
                 *cs++ = v;
         } else {
-                *cs++ = MI_STORE_DWORD_IMM | 1 << 22;
+                *cs++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;
                 *cs++ = i915_ggtt_offset(vma) + offset;
                 *cs++ = v;
                 *cs++ = MI_NOOP;
         }
         intel_ring_advance(rq, cs);
 
-        i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
+        err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
         i915_vma_unpin(vma);
 
-        reservation_object_lock(obj->resv, NULL);
-        reservation_object_add_excl_fence(obj->resv, &rq->fence);
-        reservation_object_unlock(obj->resv);
-
         i915_request_add(rq);
 
-        return 0;
+        return err;
 }
 
 static bool always_valid(struct drm_i915_private *i915)
@@ -239,8 +250,16 @@ static bool always_valid(struct drm_i915_private *i915)
         return true;
 }
 
+static bool needs_fence_registers(struct drm_i915_private *i915)
+{
+        return !i915_terminally_wedged(&i915->gpu_error);
+}
+
 static bool needs_mi_store_dword(struct drm_i915_private *i915)
 {
+        if (i915_terminally_wedged(&i915->gpu_error))
+                return false;
+
         return intel_engine_can_store_dword(i915->engine[RCS]);
 }
 
@@ -251,7 +270,7 @@ static const struct igt_coherency_mode {
         bool (*valid)(struct drm_i915_private *i915);
 } igt_coherency_mode[] = {
         { "cpu", cpu_set, cpu_get, always_valid },
-        { "gtt", gtt_set, gtt_get, always_valid },
+        { "gtt", gtt_set, gtt_get, needs_fence_registers },
         { "wc", wc_set, wc_get, always_valid },
         { "gpu", gpu_set, NULL, needs_mi_store_dword },
         { },