diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sprite.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_sprite.c | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index dd2d5683fcb1..56dc132e8e20 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c | |||
@@ -192,6 +192,7 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc, | |||
192 | const int pipe = intel_plane->pipe; | 192 | const int pipe = intel_plane->pipe; |
193 | const int plane = intel_plane->plane + 1; | 193 | const int plane = intel_plane->plane + 1; |
194 | u32 plane_ctl, stride_div, stride; | 194 | u32 plane_ctl, stride_div, stride; |
195 | int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); | ||
195 | const struct drm_intel_sprite_colorkey *key = | 196 | const struct drm_intel_sprite_colorkey *key = |
196 | &to_intel_plane_state(drm_plane->state)->ckey; | 197 | &to_intel_plane_state(drm_plane->state)->ckey; |
197 | unsigned long surf_addr; | 198 | unsigned long surf_addr; |
@@ -202,6 +203,7 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc, | |||
202 | int scaler_id; | 203 | int scaler_id; |
203 | 204 | ||
204 | plane_ctl = PLANE_CTL_ENABLE | | 205 | plane_ctl = PLANE_CTL_ENABLE | |
206 | PLANE_CTL_PIPE_GAMMA_ENABLE | | ||
205 | PLANE_CTL_PIPE_CSC_ENABLE; | 207 | PLANE_CTL_PIPE_CSC_ENABLE; |
206 | 208 | ||
207 | plane_ctl |= skl_plane_ctl_format(fb->pixel_format); | 209 | plane_ctl |= skl_plane_ctl_format(fb->pixel_format); |
@@ -210,6 +212,10 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc, | |||
210 | rotation = drm_plane->state->rotation; | 212 | rotation = drm_plane->state->rotation; |
211 | plane_ctl |= skl_plane_ctl_rotation(rotation); | 213 | plane_ctl |= skl_plane_ctl_rotation(rotation); |
212 | 214 | ||
215 | intel_update_sprite_watermarks(drm_plane, crtc, src_w, src_h, | ||
216 | pixel_size, true, | ||
217 | src_w != crtc_w || src_h != crtc_h); | ||
218 | |||
213 | stride_div = intel_fb_stride_alignment(dev, fb->modifier[0], | 219 | stride_div = intel_fb_stride_alignment(dev, fb->modifier[0], |
214 | fb->pixel_format); | 220 | fb->pixel_format); |
215 | 221 | ||
@@ -291,6 +297,8 @@ skl_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc) | |||
291 | 297 | ||
292 | I915_WRITE(PLANE_SURF(pipe, plane), 0); | 298 | I915_WRITE(PLANE_SURF(pipe, plane), 0); |
293 | POSTING_READ(PLANE_SURF(pipe, plane)); | 299 | POSTING_READ(PLANE_SURF(pipe, plane)); |
300 | |||
301 | intel_update_sprite_watermarks(dplane, crtc, 0, 0, 0, false, false); | ||
294 | } | 302 | } |
295 | 303 | ||
296 | static void | 304 | static void |
@@ -533,6 +541,10 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, | |||
533 | if (IS_HASWELL(dev) || IS_BROADWELL(dev)) | 541 | if (IS_HASWELL(dev) || IS_BROADWELL(dev)) |
534 | sprctl |= SPRITE_PIPE_CSC_ENABLE; | 542 | sprctl |= SPRITE_PIPE_CSC_ENABLE; |
535 | 543 | ||
544 | intel_update_sprite_watermarks(plane, crtc, src_w, src_h, pixel_size, | ||
545 | true, | ||
546 | src_w != crtc_w || src_h != crtc_h); | ||
547 | |||
536 | /* Sizes are 0 based */ | 548 | /* Sizes are 0 based */ |
537 | src_w--; | 549 | src_w--; |
538 | src_h--; | 550 | src_h--; |
@@ -601,7 +613,7 @@ ivb_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc) | |||
601 | struct intel_plane *intel_plane = to_intel_plane(plane); | 613 | struct intel_plane *intel_plane = to_intel_plane(plane); |
602 | int pipe = intel_plane->pipe; | 614 | int pipe = intel_plane->pipe; |
603 | 615 | ||
604 | I915_WRITE(SPRCTL(pipe), I915_READ(SPRCTL(pipe)) & ~SPRITE_ENABLE); | 616 | I915_WRITE(SPRCTL(pipe), 0); |
605 | /* Can't leave the scaler enabled... */ | 617 | /* Can't leave the scaler enabled... */ |
606 | if (intel_plane->can_scale) | 618 | if (intel_plane->can_scale) |
607 | I915_WRITE(SPRSCALE(pipe), 0); | 619 | I915_WRITE(SPRSCALE(pipe), 0); |
@@ -666,6 +678,10 @@ ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, | |||
666 | if (IS_GEN6(dev)) | 678 | if (IS_GEN6(dev)) |
667 | dvscntr |= DVS_TRICKLE_FEED_DISABLE; /* must disable */ | 679 | dvscntr |= DVS_TRICKLE_FEED_DISABLE; /* must disable */ |
668 | 680 | ||
681 | intel_update_sprite_watermarks(plane, crtc, src_w, src_h, | ||
682 | pixel_size, true, | ||
683 | src_w != crtc_w || src_h != crtc_h); | ||
684 | |||
669 | /* Sizes are 0 based */ | 685 | /* Sizes are 0 based */ |
670 | src_w--; | 686 | src_w--; |
671 | src_h--; | 687 | src_h--; |