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path: root/drivers/gpu/drm/i915/intel_psr.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_psr.c')
-rw-r--r--drivers/gpu/drm/i915/intel_psr.c65
1 files changed, 38 insertions, 27 deletions
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 29a09bf6bd18..68bd0bb34817 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -63,7 +63,7 @@ static bool is_edp_psr(struct intel_dp *intel_dp)
63 63
64static bool vlv_is_psr_active_on_pipe(struct drm_device *dev, int pipe) 64static bool vlv_is_psr_active_on_pipe(struct drm_device *dev, int pipe)
65{ 65{
66 struct drm_i915_private *dev_priv = dev->dev_private; 66 struct drm_i915_private *dev_priv = to_i915(dev);
67 uint32_t val; 67 uint32_t val;
68 68
69 val = I915_READ(VLV_PSRSTAT(pipe)) & 69 val = I915_READ(VLV_PSRSTAT(pipe)) &
@@ -77,7 +77,7 @@ static void intel_psr_write_vsc(struct intel_dp *intel_dp,
77{ 77{
78 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); 78 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
79 struct drm_device *dev = dig_port->base.base.dev; 79 struct drm_device *dev = dig_port->base.base.dev;
80 struct drm_i915_private *dev_priv = dev->dev_private; 80 struct drm_i915_private *dev_priv = to_i915(dev);
81 struct intel_crtc *crtc = to_intel_crtc(dig_port->base.base.crtc); 81 struct intel_crtc *crtc = to_intel_crtc(dig_port->base.base.crtc);
82 enum transcoder cpu_transcoder = crtc->config->cpu_transcoder; 82 enum transcoder cpu_transcoder = crtc->config->cpu_transcoder;
83 i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder); 83 i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder);
@@ -107,7 +107,7 @@ static void vlv_psr_setup_vsc(struct intel_dp *intel_dp)
107{ 107{
108 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 108 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
109 struct drm_device *dev = intel_dig_port->base.base.dev; 109 struct drm_device *dev = intel_dig_port->base.base.dev;
110 struct drm_i915_private *dev_priv = dev->dev_private; 110 struct drm_i915_private *dev_priv = to_i915(dev);
111 struct drm_crtc *crtc = intel_dig_port->base.base.crtc; 111 struct drm_crtc *crtc = intel_dig_port->base.base.crtc;
112 enum pipe pipe = to_intel_crtc(crtc)->pipe; 112 enum pipe pipe = to_intel_crtc(crtc)->pipe;
113 uint32_t val; 113 uint32_t val;
@@ -173,7 +173,7 @@ static void hsw_psr_enable_sink(struct intel_dp *intel_dp)
173{ 173{
174 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); 174 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
175 struct drm_device *dev = dig_port->base.base.dev; 175 struct drm_device *dev = dig_port->base.base.dev;
176 struct drm_i915_private *dev_priv = dev->dev_private; 176 struct drm_i915_private *dev_priv = to_i915(dev);
177 uint32_t aux_clock_divider; 177 uint32_t aux_clock_divider;
178 i915_reg_t aux_ctl_reg; 178 i915_reg_t aux_ctl_reg;
179 static const uint8_t aux_msg[] = { 179 static const uint8_t aux_msg[] = {
@@ -220,7 +220,7 @@ static void vlv_psr_enable_source(struct intel_dp *intel_dp)
220{ 220{
221 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); 221 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
222 struct drm_device *dev = dig_port->base.base.dev; 222 struct drm_device *dev = dig_port->base.base.dev;
223 struct drm_i915_private *dev_priv = dev->dev_private; 223 struct drm_i915_private *dev_priv = to_i915(dev);
224 struct drm_crtc *crtc = dig_port->base.base.crtc; 224 struct drm_crtc *crtc = dig_port->base.base.crtc;
225 enum pipe pipe = to_intel_crtc(crtc)->pipe; 225 enum pipe pipe = to_intel_crtc(crtc)->pipe;
226 226
@@ -235,7 +235,7 @@ static void vlv_psr_activate(struct intel_dp *intel_dp)
235{ 235{
236 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); 236 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
237 struct drm_device *dev = dig_port->base.base.dev; 237 struct drm_device *dev = dig_port->base.base.dev;
238 struct drm_i915_private *dev_priv = dev->dev_private; 238 struct drm_i915_private *dev_priv = to_i915(dev);
239 struct drm_crtc *crtc = dig_port->base.base.crtc; 239 struct drm_crtc *crtc = dig_port->base.base.crtc;
240 enum pipe pipe = to_intel_crtc(crtc)->pipe; 240 enum pipe pipe = to_intel_crtc(crtc)->pipe;
241 241
@@ -252,7 +252,7 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp)
252{ 252{
253 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); 253 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
254 struct drm_device *dev = dig_port->base.base.dev; 254 struct drm_device *dev = dig_port->base.base.dev;
255 struct drm_i915_private *dev_priv = dev->dev_private; 255 struct drm_i915_private *dev_priv = to_i915(dev);
256 256
257 uint32_t max_sleep_time = 0x1f; 257 uint32_t max_sleep_time = 0x1f;
258 /* Lately it was identified that depending on panel idle frame count 258 /* Lately it was identified that depending on panel idle frame count
@@ -324,7 +324,7 @@ static bool intel_psr_match_conditions(struct intel_dp *intel_dp)
324{ 324{
325 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); 325 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
326 struct drm_device *dev = dig_port->base.base.dev; 326 struct drm_device *dev = dig_port->base.base.dev;
327 struct drm_i915_private *dev_priv = dev->dev_private; 327 struct drm_i915_private *dev_priv = to_i915(dev);
328 struct drm_crtc *crtc = dig_port->base.base.crtc; 328 struct drm_crtc *crtc = dig_port->base.base.crtc;
329 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 329 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
330 330
@@ -378,7 +378,7 @@ static void intel_psr_activate(struct intel_dp *intel_dp)
378{ 378{
379 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 379 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
380 struct drm_device *dev = intel_dig_port->base.base.dev; 380 struct drm_device *dev = intel_dig_port->base.base.dev;
381 struct drm_i915_private *dev_priv = dev->dev_private; 381 struct drm_i915_private *dev_priv = to_i915(dev);
382 382
383 WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE); 383 WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE);
384 WARN_ON(dev_priv->psr.active); 384 WARN_ON(dev_priv->psr.active);
@@ -407,7 +407,7 @@ void intel_psr_enable(struct intel_dp *intel_dp)
407{ 407{
408 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 408 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
409 struct drm_device *dev = intel_dig_port->base.base.dev; 409 struct drm_device *dev = intel_dig_port->base.base.dev;
410 struct drm_i915_private *dev_priv = dev->dev_private; 410 struct drm_i915_private *dev_priv = to_i915(dev);
411 struct intel_crtc *crtc = to_intel_crtc(intel_dig_port->base.base.crtc); 411 struct intel_crtc *crtc = to_intel_crtc(intel_dig_port->base.base.crtc);
412 412
413 if (!HAS_PSR(dev)) { 413 if (!HAS_PSR(dev)) {
@@ -494,15 +494,18 @@ static void vlv_psr_disable(struct intel_dp *intel_dp)
494{ 494{
495 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 495 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
496 struct drm_device *dev = intel_dig_port->base.base.dev; 496 struct drm_device *dev = intel_dig_port->base.base.dev;
497 struct drm_i915_private *dev_priv = dev->dev_private; 497 struct drm_i915_private *dev_priv = to_i915(dev);
498 struct intel_crtc *intel_crtc = 498 struct intel_crtc *intel_crtc =
499 to_intel_crtc(intel_dig_port->base.base.crtc); 499 to_intel_crtc(intel_dig_port->base.base.crtc);
500 uint32_t val; 500 uint32_t val;
501 501
502 if (dev_priv->psr.active) { 502 if (dev_priv->psr.active) {
503 /* Put VLV PSR back to PSR_state 0 that is PSR Disabled. */ 503 /* Put VLV PSR back to PSR_state 0 that is PSR Disabled. */
504 if (wait_for((I915_READ(VLV_PSRSTAT(intel_crtc->pipe)) & 504 if (intel_wait_for_register(dev_priv,
505 VLV_EDP_PSR_IN_TRANS) == 0, 1)) 505 VLV_PSRSTAT(intel_crtc->pipe),
506 VLV_EDP_PSR_IN_TRANS,
507 0,
508 1))
506 WARN(1, "PSR transition took longer than expected\n"); 509 WARN(1, "PSR transition took longer than expected\n");
507 510
508 val = I915_READ(VLV_PSRCTL(intel_crtc->pipe)); 511 val = I915_READ(VLV_PSRCTL(intel_crtc->pipe));
@@ -521,16 +524,18 @@ static void hsw_psr_disable(struct intel_dp *intel_dp)
521{ 524{
522 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 525 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
523 struct drm_device *dev = intel_dig_port->base.base.dev; 526 struct drm_device *dev = intel_dig_port->base.base.dev;
524 struct drm_i915_private *dev_priv = dev->dev_private; 527 struct drm_i915_private *dev_priv = to_i915(dev);
525 528
526 if (dev_priv->psr.active) { 529 if (dev_priv->psr.active) {
527 I915_WRITE(EDP_PSR_CTL, 530 I915_WRITE(EDP_PSR_CTL,
528 I915_READ(EDP_PSR_CTL) & ~EDP_PSR_ENABLE); 531 I915_READ(EDP_PSR_CTL) & ~EDP_PSR_ENABLE);
529 532
530 /* Wait till PSR is idle */ 533 /* Wait till PSR is idle */
531 if (_wait_for((I915_READ(EDP_PSR_STATUS_CTL) & 534 if (intel_wait_for_register(dev_priv,
532 EDP_PSR_STATUS_STATE_MASK) == 0, 535 EDP_PSR_STATUS_CTL,
533 2 * USEC_PER_SEC, 10 * USEC_PER_MSEC)) 536 EDP_PSR_STATUS_STATE_MASK,
537 0,
538 2000))
534 DRM_ERROR("Timed out waiting for PSR Idle State\n"); 539 DRM_ERROR("Timed out waiting for PSR Idle State\n");
535 540
536 dev_priv->psr.active = false; 541 dev_priv->psr.active = false;
@@ -549,7 +554,7 @@ void intel_psr_disable(struct intel_dp *intel_dp)
549{ 554{
550 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 555 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
551 struct drm_device *dev = intel_dig_port->base.base.dev; 556 struct drm_device *dev = intel_dig_port->base.base.dev;
552 struct drm_i915_private *dev_priv = dev->dev_private; 557 struct drm_i915_private *dev_priv = to_i915(dev);
553 558
554 mutex_lock(&dev_priv->psr.lock); 559 mutex_lock(&dev_priv->psr.lock);
555 if (!dev_priv->psr.enabled) { 560 if (!dev_priv->psr.enabled) {
@@ -586,14 +591,20 @@ static void intel_psr_work(struct work_struct *work)
586 * and be ready for re-enable. 591 * and be ready for re-enable.
587 */ 592 */
588 if (HAS_DDI(dev_priv)) { 593 if (HAS_DDI(dev_priv)) {
589 if (wait_for((I915_READ(EDP_PSR_STATUS_CTL) & 594 if (intel_wait_for_register(dev_priv,
590 EDP_PSR_STATUS_STATE_MASK) == 0, 50)) { 595 EDP_PSR_STATUS_CTL,
596 EDP_PSR_STATUS_STATE_MASK,
597 0,
598 50)) {
591 DRM_ERROR("Timed out waiting for PSR Idle for re-enable\n"); 599 DRM_ERROR("Timed out waiting for PSR Idle for re-enable\n");
592 return; 600 return;
593 } 601 }
594 } else { 602 } else {
595 if (wait_for((I915_READ(VLV_PSRSTAT(pipe)) & 603 if (intel_wait_for_register(dev_priv,
596 VLV_EDP_PSR_IN_TRANS) == 0, 1)) { 604 VLV_PSRSTAT(pipe),
605 VLV_EDP_PSR_IN_TRANS,
606 0,
607 1)) {
597 DRM_ERROR("Timed out waiting for PSR Idle for re-enable\n"); 608 DRM_ERROR("Timed out waiting for PSR Idle for re-enable\n");
598 return; 609 return;
599 } 610 }
@@ -619,7 +630,7 @@ unlock:
619 630
620static void intel_psr_exit(struct drm_device *dev) 631static void intel_psr_exit(struct drm_device *dev)
621{ 632{
622 struct drm_i915_private *dev_priv = dev->dev_private; 633 struct drm_i915_private *dev_priv = to_i915(dev);
623 struct intel_dp *intel_dp = dev_priv->psr.enabled; 634 struct intel_dp *intel_dp = dev_priv->psr.enabled;
624 struct drm_crtc *crtc = dp_to_dig_port(intel_dp)->base.base.crtc; 635 struct drm_crtc *crtc = dp_to_dig_port(intel_dp)->base.base.crtc;
625 enum pipe pipe = to_intel_crtc(crtc)->pipe; 636 enum pipe pipe = to_intel_crtc(crtc)->pipe;
@@ -674,7 +685,7 @@ static void intel_psr_exit(struct drm_device *dev)
674void intel_psr_single_frame_update(struct drm_device *dev, 685void intel_psr_single_frame_update(struct drm_device *dev,
675 unsigned frontbuffer_bits) 686 unsigned frontbuffer_bits)
676{ 687{
677 struct drm_i915_private *dev_priv = dev->dev_private; 688 struct drm_i915_private *dev_priv = to_i915(dev);
678 struct drm_crtc *crtc; 689 struct drm_crtc *crtc;
679 enum pipe pipe; 690 enum pipe pipe;
680 u32 val; 691 u32 val;
@@ -722,7 +733,7 @@ void intel_psr_single_frame_update(struct drm_device *dev,
722void intel_psr_invalidate(struct drm_device *dev, 733void intel_psr_invalidate(struct drm_device *dev,
723 unsigned frontbuffer_bits) 734 unsigned frontbuffer_bits)
724{ 735{
725 struct drm_i915_private *dev_priv = dev->dev_private; 736 struct drm_i915_private *dev_priv = to_i915(dev);
726 struct drm_crtc *crtc; 737 struct drm_crtc *crtc;
727 enum pipe pipe; 738 enum pipe pipe;
728 739
@@ -760,7 +771,7 @@ void intel_psr_invalidate(struct drm_device *dev,
760void intel_psr_flush(struct drm_device *dev, 771void intel_psr_flush(struct drm_device *dev,
761 unsigned frontbuffer_bits, enum fb_op_origin origin) 772 unsigned frontbuffer_bits, enum fb_op_origin origin)
762{ 773{
763 struct drm_i915_private *dev_priv = dev->dev_private; 774 struct drm_i915_private *dev_priv = to_i915(dev);
764 struct drm_crtc *crtc; 775 struct drm_crtc *crtc;
765 enum pipe pipe; 776 enum pipe pipe;
766 777
@@ -796,7 +807,7 @@ void intel_psr_flush(struct drm_device *dev,
796 */ 807 */
797void intel_psr_init(struct drm_device *dev) 808void intel_psr_init(struct drm_device *dev)
798{ 809{
799 struct drm_i915_private *dev_priv = dev->dev_private; 810 struct drm_i915_private *dev_priv = to_i915(dev);
800 811
801 dev_priv->psr_mmio_base = IS_HASWELL(dev_priv) ? 812 dev_priv->psr_mmio_base = IS_HASWELL(dev_priv) ?
802 HSW_EDP_PSR_BASE : BDW_EDP_PSR_BASE; 813 HSW_EDP_PSR_BASE : BDW_EDP_PSR_BASE;