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path: root/drivers/gpu/drm/i915/intel_pm.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d10e6735771f..51a2a60f5bfc 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5476,7 +5476,7 @@ static void vlv_force_wake_put(struct drm_i915_private *dev_priv)
5476 gen6_gt_check_fifodbg(dev_priv); 5476 gen6_gt_check_fifodbg(dev_priv);
5477} 5477}
5478 5478
5479void intel_gt_reset(struct drm_device *dev) 5479void intel_gt_sanitize(struct drm_device *dev)
5480{ 5480{
5481 struct drm_i915_private *dev_priv = dev->dev_private; 5481 struct drm_i915_private *dev_priv = dev->dev_private;
5482 5482
@@ -5487,16 +5487,16 @@ void intel_gt_reset(struct drm_device *dev)
5487 if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) 5487 if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
5488 __gen6_gt_force_wake_mt_reset(dev_priv); 5488 __gen6_gt_force_wake_mt_reset(dev_priv);
5489 } 5489 }
5490
5491 /* BIOS often leaves RC6 enabled, but disable it for hw init */
5492 if (INTEL_INFO(dev)->gen >= 6)
5493 intel_disable_gt_powersave(dev);
5490} 5494}
5491 5495
5492void intel_gt_init(struct drm_device *dev) 5496void intel_gt_init(struct drm_device *dev)
5493{ 5497{
5494 struct drm_i915_private *dev_priv = dev->dev_private; 5498 struct drm_i915_private *dev_priv = dev->dev_private;
5495 5499
5496 spin_lock_init(&dev_priv->gt_lock);
5497
5498 intel_gt_reset(dev);
5499
5500 if (IS_VALLEYVIEW(dev)) { 5500 if (IS_VALLEYVIEW(dev)) {
5501 dev_priv->gt.force_wake_get = vlv_force_wake_get; 5501 dev_priv->gt.force_wake_get = vlv_force_wake_get;
5502 dev_priv->gt.force_wake_put = vlv_force_wake_put; 5502 dev_priv->gt.force_wake_put = vlv_force_wake_put;