diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 22 |
1 files changed, 14 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 379eabe093cb..347d4df49a9b 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -2851,7 +2851,10 @@ void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv, | |||
2851 | memset(ddb, 0, sizeof(*ddb)); | 2851 | memset(ddb, 0, sizeof(*ddb)); |
2852 | 2852 | ||
2853 | for_each_pipe(dev_priv, pipe) { | 2853 | for_each_pipe(dev_priv, pipe) { |
2854 | if (!intel_display_power_is_enabled(dev_priv, POWER_DOMAIN_PIPE(pipe))) | 2854 | enum intel_display_power_domain power_domain; |
2855 | |||
2856 | power_domain = POWER_DOMAIN_PIPE(pipe); | ||
2857 | if (!intel_display_power_get_if_enabled(dev_priv, power_domain)) | ||
2855 | continue; | 2858 | continue; |
2856 | 2859 | ||
2857 | for_each_plane(dev_priv, pipe, plane) { | 2860 | for_each_plane(dev_priv, pipe, plane) { |
@@ -2863,6 +2866,8 @@ void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv, | |||
2863 | val = I915_READ(CUR_BUF_CFG(pipe)); | 2866 | val = I915_READ(CUR_BUF_CFG(pipe)); |
2864 | skl_ddb_entry_init_from_hw(&ddb->plane[pipe][PLANE_CURSOR], | 2867 | skl_ddb_entry_init_from_hw(&ddb->plane[pipe][PLANE_CURSOR], |
2865 | val); | 2868 | val); |
2869 | |||
2870 | intel_display_power_put(dev_priv, power_domain); | ||
2866 | } | 2871 | } |
2867 | } | 2872 | } |
2868 | 2873 | ||
@@ -4116,11 +4121,13 @@ bool ironlake_set_drps(struct drm_device *dev, u8 val) | |||
4116 | static void ironlake_enable_drps(struct drm_device *dev) | 4121 | static void ironlake_enable_drps(struct drm_device *dev) |
4117 | { | 4122 | { |
4118 | struct drm_i915_private *dev_priv = dev->dev_private; | 4123 | struct drm_i915_private *dev_priv = dev->dev_private; |
4119 | u32 rgvmodectl = I915_READ(MEMMODECTL); | 4124 | u32 rgvmodectl; |
4120 | u8 fmax, fmin, fstart, vstart; | 4125 | u8 fmax, fmin, fstart, vstart; |
4121 | 4126 | ||
4122 | spin_lock_irq(&mchdev_lock); | 4127 | spin_lock_irq(&mchdev_lock); |
4123 | 4128 | ||
4129 | rgvmodectl = I915_READ(MEMMODECTL); | ||
4130 | |||
4124 | /* Enable temp reporting */ | 4131 | /* Enable temp reporting */ |
4125 | I915_WRITE16(PMMISC, I915_READ(PMMISC) | MCPPCE_EN); | 4132 | I915_WRITE16(PMMISC, I915_READ(PMMISC) | MCPPCE_EN); |
4126 | I915_WRITE16(TSC1, I915_READ(TSC1) | TSE); | 4133 | I915_WRITE16(TSC1, I915_READ(TSC1) | TSE); |
@@ -5229,8 +5236,6 @@ static void cherryview_setup_pctx(struct drm_device *dev) | |||
5229 | u32 pcbr; | 5236 | u32 pcbr; |
5230 | int pctx_size = 32*1024; | 5237 | int pctx_size = 32*1024; |
5231 | 5238 | ||
5232 | WARN_ON(!mutex_is_locked(&dev->struct_mutex)); | ||
5233 | |||
5234 | pcbr = I915_READ(VLV_PCBR); | 5239 | pcbr = I915_READ(VLV_PCBR); |
5235 | if ((pcbr >> VLV_PCBR_ADDR_SHIFT) == 0) { | 5240 | if ((pcbr >> VLV_PCBR_ADDR_SHIFT) == 0) { |
5236 | DRM_DEBUG_DRIVER("BIOS didn't set up PCBR, fixing up\n"); | 5241 | DRM_DEBUG_DRIVER("BIOS didn't set up PCBR, fixing up\n"); |
@@ -5252,7 +5257,7 @@ static void valleyview_setup_pctx(struct drm_device *dev) | |||
5252 | u32 pcbr; | 5257 | u32 pcbr; |
5253 | int pctx_size = 24*1024; | 5258 | int pctx_size = 24*1024; |
5254 | 5259 | ||
5255 | WARN_ON(!mutex_is_locked(&dev->struct_mutex)); | 5260 | mutex_lock(&dev->struct_mutex); |
5256 | 5261 | ||
5257 | pcbr = I915_READ(VLV_PCBR); | 5262 | pcbr = I915_READ(VLV_PCBR); |
5258 | if (pcbr) { | 5263 | if (pcbr) { |
@@ -5280,7 +5285,7 @@ static void valleyview_setup_pctx(struct drm_device *dev) | |||
5280 | pctx = i915_gem_object_create_stolen(dev, pctx_size); | 5285 | pctx = i915_gem_object_create_stolen(dev, pctx_size); |
5281 | if (!pctx) { | 5286 | if (!pctx) { |
5282 | DRM_DEBUG("not enough stolen space for PCTX, disabling\n"); | 5287 | DRM_DEBUG("not enough stolen space for PCTX, disabling\n"); |
5283 | return; | 5288 | goto out; |
5284 | } | 5289 | } |
5285 | 5290 | ||
5286 | pctx_paddr = dev_priv->mm.stolen_base + pctx->stolen->start; | 5291 | pctx_paddr = dev_priv->mm.stolen_base + pctx->stolen->start; |
@@ -5289,6 +5294,7 @@ static void valleyview_setup_pctx(struct drm_device *dev) | |||
5289 | out: | 5294 | out: |
5290 | DRM_DEBUG_DRIVER("PCBR: 0x%08x\n", I915_READ(VLV_PCBR)); | 5295 | DRM_DEBUG_DRIVER("PCBR: 0x%08x\n", I915_READ(VLV_PCBR)); |
5291 | dev_priv->vlv_pctx = pctx; | 5296 | dev_priv->vlv_pctx = pctx; |
5297 | mutex_unlock(&dev->struct_mutex); | ||
5292 | } | 5298 | } |
5293 | 5299 | ||
5294 | static void valleyview_cleanup_pctx(struct drm_device *dev) | 5300 | static void valleyview_cleanup_pctx(struct drm_device *dev) |
@@ -5298,7 +5304,7 @@ static void valleyview_cleanup_pctx(struct drm_device *dev) | |||
5298 | if (WARN_ON(!dev_priv->vlv_pctx)) | 5304 | if (WARN_ON(!dev_priv->vlv_pctx)) |
5299 | return; | 5305 | return; |
5300 | 5306 | ||
5301 | drm_gem_object_unreference(&dev_priv->vlv_pctx->base); | 5307 | drm_gem_object_unreference_unlocked(&dev_priv->vlv_pctx->base); |
5302 | dev_priv->vlv_pctx = NULL; | 5308 | dev_priv->vlv_pctx = NULL; |
5303 | } | 5309 | } |
5304 | 5310 | ||
@@ -6241,8 +6247,8 @@ void intel_enable_gt_powersave(struct drm_device *dev) | |||
6241 | return; | 6247 | return; |
6242 | 6248 | ||
6243 | if (IS_IRONLAKE_M(dev)) { | 6249 | if (IS_IRONLAKE_M(dev)) { |
6244 | mutex_lock(&dev->struct_mutex); | ||
6245 | ironlake_enable_drps(dev); | 6250 | ironlake_enable_drps(dev); |
6251 | mutex_lock(&dev->struct_mutex); | ||
6246 | intel_init_emon(dev); | 6252 | intel_init_emon(dev); |
6247 | mutex_unlock(&dev->struct_mutex); | 6253 | mutex_unlock(&dev->struct_mutex); |
6248 | } else if (INTEL_INFO(dev)->gen >= 6) { | 6254 | } else if (INTEL_INFO(dev)->gen >= 6) { |