diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 071a76b9ac52..f091ad12d694 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -4782,8 +4782,7 @@ static void gen9_enable_rc6(struct drm_device *dev) | |||
4782 | /* 2b: Program RC6 thresholds.*/ | 4782 | /* 2b: Program RC6 thresholds.*/ |
4783 | 4783 | ||
4784 | /* WaRsDoubleRc6WrlWithCoarsePowerGating: Doubling WRL only when CPG is enabled */ | 4784 | /* WaRsDoubleRc6WrlWithCoarsePowerGating: Doubling WRL only when CPG is enabled */ |
4785 | if (IS_SKYLAKE(dev) && !((IS_SKL_GT3(dev) || IS_SKL_GT4(dev)) && | 4785 | if (IS_SKYLAKE(dev)) |
4786 | (INTEL_REVID(dev) <= SKL_REVID_E0))) | ||
4787 | I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 108 << 16); | 4786 | I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 108 << 16); |
4788 | else | 4787 | else |
4789 | I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16); | 4788 | I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16); |
@@ -4825,7 +4824,7 @@ static void gen9_enable_rc6(struct drm_device *dev) | |||
4825 | * WaRsDisableCoarsePowerGating:skl,bxt - Render/Media PG need to be disabled with RC6. | 4824 | * WaRsDisableCoarsePowerGating:skl,bxt - Render/Media PG need to be disabled with RC6. |
4826 | */ | 4825 | */ |
4827 | if ((IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) || | 4826 | if ((IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) || |
4828 | ((IS_SKL_GT3(dev) || IS_SKL_GT4(dev)) && (INTEL_REVID(dev) <= SKL_REVID_E0))) | 4827 | ((IS_SKL_GT3(dev) || IS_SKL_GT4(dev)) && (INTEL_REVID(dev) <= SKL_REVID_F0))) |
4829 | I915_WRITE(GEN9_PG_ENABLE, 0); | 4828 | I915_WRITE(GEN9_PG_ENABLE, 0); |
4830 | else | 4829 | else |
4831 | I915_WRITE(GEN9_PG_ENABLE, (rc6_mask & GEN6_RC_CTL_RC6_ENABLE) ? | 4830 | I915_WRITE(GEN9_PG_ENABLE, (rc6_mask & GEN6_RC_CTL_RC6_ENABLE) ? |