diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_guc.h')
-rw-r--r-- | drivers/gpu/drm/i915/intel_guc.h | 32 |
1 files changed, 29 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index 5cdf7aa75be5..0053258e03d3 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h | |||
@@ -64,7 +64,7 @@ struct drm_i915_gem_request; | |||
64 | */ | 64 | */ |
65 | struct i915_guc_client { | 65 | struct i915_guc_client { |
66 | struct i915_vma *vma; | 66 | struct i915_vma *vma; |
67 | void *client_base; /* first page (only) of above */ | 67 | void *vaddr; |
68 | struct i915_gem_context *owner; | 68 | struct i915_gem_context *owner; |
69 | struct intel_guc *guc; | 69 | struct intel_guc *guc; |
70 | 70 | ||
@@ -123,10 +123,28 @@ struct intel_guc_fw { | |||
123 | uint32_t ucode_offset; | 123 | uint32_t ucode_offset; |
124 | }; | 124 | }; |
125 | 125 | ||
126 | struct intel_guc_log { | ||
127 | uint32_t flags; | ||
128 | struct i915_vma *vma; | ||
129 | void *buf_addr; | ||
130 | struct workqueue_struct *flush_wq; | ||
131 | struct work_struct flush_work; | ||
132 | struct rchan *relay_chan; | ||
133 | |||
134 | /* logging related stats */ | ||
135 | u32 capture_miss_count; | ||
136 | u32 flush_interrupt_count; | ||
137 | u32 prev_overflow_count[GUC_MAX_LOG_BUFFER]; | ||
138 | u32 total_overflow_count[GUC_MAX_LOG_BUFFER]; | ||
139 | u32 flush_count[GUC_MAX_LOG_BUFFER]; | ||
140 | }; | ||
141 | |||
126 | struct intel_guc { | 142 | struct intel_guc { |
127 | struct intel_guc_fw guc_fw; | 143 | struct intel_guc_fw guc_fw; |
128 | uint32_t log_flags; | 144 | struct intel_guc_log log; |
129 | struct i915_vma *log_vma; | 145 | |
146 | /* GuC2Host interrupt related state */ | ||
147 | bool interrupts_enabled; | ||
130 | 148 | ||
131 | struct i915_vma *ads_vma; | 149 | struct i915_vma *ads_vma; |
132 | struct i915_vma *ctx_pool_vma; | 150 | struct i915_vma *ctx_pool_vma; |
@@ -146,6 +164,9 @@ struct intel_guc { | |||
146 | 164 | ||
147 | uint64_t submissions[I915_NUM_ENGINES]; | 165 | uint64_t submissions[I915_NUM_ENGINES]; |
148 | uint32_t last_seqno[I915_NUM_ENGINES]; | 166 | uint32_t last_seqno[I915_NUM_ENGINES]; |
167 | |||
168 | /* To serialize the Host2GuC actions */ | ||
169 | struct mutex action_lock; | ||
149 | }; | 170 | }; |
150 | 171 | ||
151 | /* intel_guc_loader.c */ | 172 | /* intel_guc_loader.c */ |
@@ -163,5 +184,10 @@ int i915_guc_wq_reserve(struct drm_i915_gem_request *rq); | |||
163 | void i915_guc_wq_unreserve(struct drm_i915_gem_request *request); | 184 | void i915_guc_wq_unreserve(struct drm_i915_gem_request *request); |
164 | void i915_guc_submission_disable(struct drm_i915_private *dev_priv); | 185 | void i915_guc_submission_disable(struct drm_i915_private *dev_priv); |
165 | void i915_guc_submission_fini(struct drm_i915_private *dev_priv); | 186 | void i915_guc_submission_fini(struct drm_i915_private *dev_priv); |
187 | void i915_guc_capture_logs(struct drm_i915_private *dev_priv); | ||
188 | void i915_guc_flush_logs(struct drm_i915_private *dev_priv); | ||
189 | void i915_guc_register(struct drm_i915_private *dev_priv); | ||
190 | void i915_guc_unregister(struct drm_i915_private *dev_priv); | ||
191 | int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val); | ||
166 | 192 | ||
167 | #endif | 193 | #endif |