diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dsi.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dsi.c | 29 |
1 files changed, 19 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index 378f879f4015..01b8e9f4c272 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c | |||
@@ -634,7 +634,6 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder) | |||
634 | { | 634 | { |
635 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; | 635 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
636 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); | 636 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); |
637 | u32 val; | ||
638 | 637 | ||
639 | DRM_DEBUG_KMS("\n"); | 638 | DRM_DEBUG_KMS("\n"); |
640 | 639 | ||
@@ -642,9 +641,13 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder) | |||
642 | 641 | ||
643 | intel_dsi_clear_device_ready(encoder); | 642 | intel_dsi_clear_device_ready(encoder); |
644 | 643 | ||
645 | val = I915_READ(DSPCLK_GATE_D); | 644 | if (!IS_BROXTON(dev_priv)) { |
646 | val &= ~DPOUNIT_CLOCK_GATE_DISABLE; | 645 | u32 val; |
647 | I915_WRITE(DSPCLK_GATE_D, val); | 646 | |
647 | val = I915_READ(DSPCLK_GATE_D); | ||
648 | val &= ~DPOUNIT_CLOCK_GATE_DISABLE; | ||
649 | I915_WRITE(DSPCLK_GATE_D, val); | ||
650 | } | ||
648 | 651 | ||
649 | drm_panel_unprepare(intel_dsi->panel); | 652 | drm_panel_unprepare(intel_dsi->panel); |
650 | 653 | ||
@@ -664,13 +667,16 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder, | |||
664 | struct drm_device *dev = encoder->base.dev; | 667 | struct drm_device *dev = encoder->base.dev; |
665 | enum intel_display_power_domain power_domain; | 668 | enum intel_display_power_domain power_domain; |
666 | enum port port; | 669 | enum port port; |
670 | bool ret; | ||
667 | 671 | ||
668 | DRM_DEBUG_KMS("\n"); | 672 | DRM_DEBUG_KMS("\n"); |
669 | 673 | ||
670 | power_domain = intel_display_port_power_domain(encoder); | 674 | power_domain = intel_display_port_power_domain(encoder); |
671 | if (!intel_display_power_is_enabled(dev_priv, power_domain)) | 675 | if (!intel_display_power_get_if_enabled(dev_priv, power_domain)) |
672 | return false; | 676 | return false; |
673 | 677 | ||
678 | ret = false; | ||
679 | |||
674 | /* XXX: this only works for one DSI output */ | 680 | /* XXX: this only works for one DSI output */ |
675 | for_each_dsi_port(port, intel_dsi->ports) { | 681 | for_each_dsi_port(port, intel_dsi->ports) { |
676 | i915_reg_t ctrl_reg = IS_BROXTON(dev) ? | 682 | i915_reg_t ctrl_reg = IS_BROXTON(dev) ? |
@@ -691,12 +697,16 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder, | |||
691 | if (dpi_enabled || (func & CMD_MODE_DATA_WIDTH_MASK)) { | 697 | if (dpi_enabled || (func & CMD_MODE_DATA_WIDTH_MASK)) { |
692 | if (I915_READ(MIPI_DEVICE_READY(port)) & DEVICE_READY) { | 698 | if (I915_READ(MIPI_DEVICE_READY(port)) & DEVICE_READY) { |
693 | *pipe = port == PORT_A ? PIPE_A : PIPE_B; | 699 | *pipe = port == PORT_A ? PIPE_A : PIPE_B; |
694 | return true; | 700 | ret = true; |
701 | |||
702 | goto out; | ||
695 | } | 703 | } |
696 | } | 704 | } |
697 | } | 705 | } |
706 | out: | ||
707 | intel_display_power_put(dev_priv, power_domain); | ||
698 | 708 | ||
699 | return false; | 709 | return ret; |
700 | } | 710 | } |
701 | 711 | ||
702 | static void intel_dsi_get_config(struct intel_encoder *encoder, | 712 | static void intel_dsi_get_config(struct intel_encoder *encoder, |
@@ -775,10 +785,9 @@ static void set_dsi_timings(struct drm_encoder *encoder, | |||
775 | { | 785 | { |
776 | struct drm_device *dev = encoder->dev; | 786 | struct drm_device *dev = encoder->dev; |
777 | struct drm_i915_private *dev_priv = dev->dev_private; | 787 | struct drm_i915_private *dev_priv = dev->dev_private; |
778 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); | ||
779 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder); | 788 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder); |
780 | enum port port; | 789 | enum port port; |
781 | unsigned int bpp = intel_crtc->config->pipe_bpp; | 790 | unsigned int bpp = dsi_pixel_format_bpp(intel_dsi->pixel_format); |
782 | unsigned int lane_count = intel_dsi->lane_count; | 791 | unsigned int lane_count = intel_dsi->lane_count; |
783 | 792 | ||
784 | u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp; | 793 | u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp; |
@@ -849,7 +858,7 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder) | |||
849 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder); | 858 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder); |
850 | const struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode; | 859 | const struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode; |
851 | enum port port; | 860 | enum port port; |
852 | unsigned int bpp = intel_crtc->config->pipe_bpp; | 861 | unsigned int bpp = dsi_pixel_format_bpp(intel_dsi->pixel_format); |
853 | u32 val, tmp; | 862 | u32 val, tmp; |
854 | u16 mode_hdisplay; | 863 | u16 mode_hdisplay; |
855 | 864 | ||