diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
-rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 35 |
1 files changed, 23 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 9c7090590776..fa9910481ab0 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
@@ -78,6 +78,12 @@ | |||
78 | #define MAX_OUTPUTS 6 | 78 | #define MAX_OUTPUTS 6 |
79 | /* maximum connectors per crtcs in the mode set */ | 79 | /* maximum connectors per crtcs in the mode set */ |
80 | 80 | ||
81 | /* Maximum cursor sizes */ | ||
82 | #define GEN2_CURSOR_WIDTH 64 | ||
83 | #define GEN2_CURSOR_HEIGHT 64 | ||
84 | #define CURSOR_WIDTH 256 | ||
85 | #define CURSOR_HEIGHT 256 | ||
86 | |||
81 | #define INTEL_I2C_BUS_DVO 1 | 87 | #define INTEL_I2C_BUS_DVO 1 |
82 | #define INTEL_I2C_BUS_SDVO 2 | 88 | #define INTEL_I2C_BUS_SDVO 2 |
83 | 89 | ||
@@ -113,6 +119,7 @@ struct intel_fbdev { | |||
113 | struct intel_framebuffer *fb; | 119 | struct intel_framebuffer *fb; |
114 | struct list_head fbdev_list; | 120 | struct list_head fbdev_list; |
115 | struct drm_display_mode *our_mode; | 121 | struct drm_display_mode *our_mode; |
122 | int preferred_bpp; | ||
116 | }; | 123 | }; |
117 | 124 | ||
118 | struct intel_encoder { | 125 | struct intel_encoder { |
@@ -124,11 +131,7 @@ struct intel_encoder { | |||
124 | struct intel_crtc *new_crtc; | 131 | struct intel_crtc *new_crtc; |
125 | 132 | ||
126 | int type; | 133 | int type; |
127 | /* | 134 | unsigned int cloneable; |
128 | * Intel hw has only one MUX where encoders could be clone, hence a | ||
129 | * simple flag is enough to compute the possible_clones mask. | ||
130 | */ | ||
131 | bool cloneable; | ||
132 | bool connectors_active; | 135 | bool connectors_active; |
133 | void (*hot_plug)(struct intel_encoder *); | 136 | void (*hot_plug)(struct intel_encoder *); |
134 | bool (*compute_config)(struct intel_encoder *, | 137 | bool (*compute_config)(struct intel_encoder *, |
@@ -218,6 +221,12 @@ typedef struct dpll { | |||
218 | int p; | 221 | int p; |
219 | } intel_clock_t; | 222 | } intel_clock_t; |
220 | 223 | ||
224 | struct intel_plane_config { | ||
225 | bool tiled; | ||
226 | int size; | ||
227 | u32 base; | ||
228 | }; | ||
229 | |||
221 | struct intel_crtc_config { | 230 | struct intel_crtc_config { |
222 | /** | 231 | /** |
223 | * quirks - bitfield with hw state readout quirks | 232 | * quirks - bitfield with hw state readout quirks |
@@ -364,8 +373,10 @@ struct intel_crtc { | |||
364 | uint32_t cursor_addr; | 373 | uint32_t cursor_addr; |
365 | int16_t cursor_x, cursor_y; | 374 | int16_t cursor_x, cursor_y; |
366 | int16_t cursor_width, cursor_height; | 375 | int16_t cursor_width, cursor_height; |
376 | int16_t max_cursor_width, max_cursor_height; | ||
367 | bool cursor_visible; | 377 | bool cursor_visible; |
368 | 378 | ||
379 | struct intel_plane_config plane_config; | ||
369 | struct intel_crtc_config config; | 380 | struct intel_crtc_config config; |
370 | struct intel_crtc_config *new_config; | 381 | struct intel_crtc_config *new_config; |
371 | bool new_enabled; | 382 | bool new_enabled; |
@@ -485,8 +496,7 @@ struct intel_dp { | |||
485 | uint8_t dpcd[DP_RECEIVER_CAP_SIZE]; | 496 | uint8_t dpcd[DP_RECEIVER_CAP_SIZE]; |
486 | uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE]; | 497 | uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE]; |
487 | uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS]; | 498 | uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS]; |
488 | struct i2c_adapter adapter; | 499 | struct drm_dp_aux aux; |
489 | struct i2c_algo_dp_aux_data algo; | ||
490 | uint8_t train_set[4]; | 500 | uint8_t train_set[4]; |
491 | int panel_power_up_delay; | 501 | int panel_power_up_delay; |
492 | int panel_power_down_delay; | 502 | int panel_power_down_delay; |
@@ -618,8 +628,8 @@ void ilk_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); | |||
618 | void ilk_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); | 628 | void ilk_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
619 | void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); | 629 | void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
620 | void snb_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); | 630 | void snb_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
621 | void hsw_pc8_disable_interrupts(struct drm_device *dev); | 631 | void hsw_runtime_pm_disable_interrupts(struct drm_device *dev); |
622 | void hsw_pc8_restore_interrupts(struct drm_device *dev); | 632 | void hsw_runtime_pm_restore_interrupts(struct drm_device *dev); |
623 | 633 | ||
624 | 634 | ||
625 | /* intel_crt.c */ | 635 | /* intel_crt.c */ |
@@ -722,9 +732,8 @@ unsigned long intel_gen4_compute_page_offset(int *x, int *y, | |||
722 | unsigned int bpp, | 732 | unsigned int bpp, |
723 | unsigned int pitch); | 733 | unsigned int pitch); |
724 | void intel_display_handle_reset(struct drm_device *dev); | 734 | void intel_display_handle_reset(struct drm_device *dev); |
725 | void hsw_enable_pc8_work(struct work_struct *__work); | 735 | void hsw_enable_pc8(struct drm_i915_private *dev_priv); |
726 | void hsw_enable_package_c8(struct drm_i915_private *dev_priv); | 736 | void hsw_disable_pc8(struct drm_i915_private *dev_priv); |
727 | void hsw_disable_package_c8(struct drm_i915_private *dev_priv); | ||
728 | void intel_dp_get_m_n(struct intel_crtc *crtc, | 737 | void intel_dp_get_m_n(struct intel_crtc *crtc, |
729 | struct intel_crtc_config *pipe_config); | 738 | struct intel_crtc_config *pipe_config); |
730 | int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n); | 739 | int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n); |
@@ -740,6 +749,7 @@ intel_display_port_power_domain(struct intel_encoder *intel_encoder); | |||
740 | int valleyview_get_vco(struct drm_i915_private *dev_priv); | 749 | int valleyview_get_vco(struct drm_i915_private *dev_priv); |
741 | void intel_mode_from_pipe_config(struct drm_display_mode *mode, | 750 | void intel_mode_from_pipe_config(struct drm_display_mode *mode, |
742 | struct intel_crtc_config *pipe_config); | 751 | struct intel_crtc_config *pipe_config); |
752 | int intel_format_to_fourcc(int format); | ||
743 | 753 | ||
744 | /* intel_dp.c */ | 754 | /* intel_dp.c */ |
745 | void intel_dp_init(struct drm_device *dev, int output_reg, enum port port); | 755 | void intel_dp_init(struct drm_device *dev, int output_reg, enum port port); |
@@ -757,6 +767,7 @@ bool intel_dp_compute_config(struct intel_encoder *encoder, | |||
757 | bool intel_dp_is_edp(struct drm_device *dev, enum port port); | 767 | bool intel_dp_is_edp(struct drm_device *dev, enum port port); |
758 | void intel_edp_backlight_on(struct intel_dp *intel_dp); | 768 | void intel_edp_backlight_on(struct intel_dp *intel_dp); |
759 | void intel_edp_backlight_off(struct intel_dp *intel_dp); | 769 | void intel_edp_backlight_off(struct intel_dp *intel_dp); |
770 | void intel_edp_panel_vdd_on(struct intel_dp *intel_dp); | ||
760 | void intel_edp_panel_on(struct intel_dp *intel_dp); | 771 | void intel_edp_panel_on(struct intel_dp *intel_dp); |
761 | void intel_edp_panel_off(struct intel_dp *intel_dp); | 772 | void intel_edp_panel_off(struct intel_dp *intel_dp); |
762 | void intel_edp_psr_enable(struct intel_dp *intel_dp); | 773 | void intel_edp_psr_enable(struct intel_dp *intel_dp); |