diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dpll_mgr.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dpll_mgr.c | 30 |
1 files changed, 17 insertions, 13 deletions
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c index c0eff1571731..5c1f2d235ffa 100644 --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c | |||
@@ -83,7 +83,7 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv, | |||
83 | void intel_prepare_shared_dpll(struct intel_crtc *crtc) | 83 | void intel_prepare_shared_dpll(struct intel_crtc *crtc) |
84 | { | 84 | { |
85 | struct drm_device *dev = crtc->base.dev; | 85 | struct drm_device *dev = crtc->base.dev; |
86 | struct drm_i915_private *dev_priv = dev->dev_private; | 86 | struct drm_i915_private *dev_priv = to_i915(dev); |
87 | struct intel_shared_dpll *pll = crtc->config->shared_dpll; | 87 | struct intel_shared_dpll *pll = crtc->config->shared_dpll; |
88 | 88 | ||
89 | if (WARN_ON(pll == NULL)) | 89 | if (WARN_ON(pll == NULL)) |
@@ -112,7 +112,7 @@ void intel_prepare_shared_dpll(struct intel_crtc *crtc) | |||
112 | void intel_enable_shared_dpll(struct intel_crtc *crtc) | 112 | void intel_enable_shared_dpll(struct intel_crtc *crtc) |
113 | { | 113 | { |
114 | struct drm_device *dev = crtc->base.dev; | 114 | struct drm_device *dev = crtc->base.dev; |
115 | struct drm_i915_private *dev_priv = dev->dev_private; | 115 | struct drm_i915_private *dev_priv = to_i915(dev); |
116 | struct intel_shared_dpll *pll = crtc->config->shared_dpll; | 116 | struct intel_shared_dpll *pll = crtc->config->shared_dpll; |
117 | unsigned crtc_mask = 1 << drm_crtc_index(&crtc->base); | 117 | unsigned crtc_mask = 1 << drm_crtc_index(&crtc->base); |
118 | unsigned old_mask; | 118 | unsigned old_mask; |
@@ -151,7 +151,7 @@ out: | |||
151 | void intel_disable_shared_dpll(struct intel_crtc *crtc) | 151 | void intel_disable_shared_dpll(struct intel_crtc *crtc) |
152 | { | 152 | { |
153 | struct drm_device *dev = crtc->base.dev; | 153 | struct drm_device *dev = crtc->base.dev; |
154 | struct drm_i915_private *dev_priv = dev->dev_private; | 154 | struct drm_i915_private *dev_priv = to_i915(dev); |
155 | struct intel_shared_dpll *pll = crtc->config->shared_dpll; | 155 | struct intel_shared_dpll *pll = crtc->config->shared_dpll; |
156 | unsigned crtc_mask = 1 << drm_crtc_index(&crtc->base); | 156 | unsigned crtc_mask = 1 << drm_crtc_index(&crtc->base); |
157 | 157 | ||
@@ -191,7 +191,7 @@ intel_find_shared_dpll(struct intel_crtc *crtc, | |||
191 | enum intel_dpll_id range_min, | 191 | enum intel_dpll_id range_min, |
192 | enum intel_dpll_id range_max) | 192 | enum intel_dpll_id range_max) |
193 | { | 193 | { |
194 | struct drm_i915_private *dev_priv = crtc->base.dev->dev_private; | 194 | struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); |
195 | struct intel_shared_dpll *pll; | 195 | struct intel_shared_dpll *pll; |
196 | struct intel_shared_dpll_config *shared_dpll; | 196 | struct intel_shared_dpll_config *shared_dpll; |
197 | enum intel_dpll_id i; | 197 | enum intel_dpll_id i; |
@@ -331,7 +331,7 @@ static void ibx_pch_dpll_enable(struct drm_i915_private *dev_priv, | |||
331 | static void ibx_pch_dpll_disable(struct drm_i915_private *dev_priv, | 331 | static void ibx_pch_dpll_disable(struct drm_i915_private *dev_priv, |
332 | struct intel_shared_dpll *pll) | 332 | struct intel_shared_dpll *pll) |
333 | { | 333 | { |
334 | struct drm_device *dev = dev_priv->dev; | 334 | struct drm_device *dev = &dev_priv->drm; |
335 | struct intel_crtc *crtc; | 335 | struct intel_crtc *crtc; |
336 | 336 | ||
337 | /* Make sure no transcoder isn't still depending on us. */ | 337 | /* Make sure no transcoder isn't still depending on us. */ |
@@ -713,7 +713,7 @@ hsw_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, | |||
713 | pll = intel_find_shared_dpll(crtc, crtc_state, | 713 | pll = intel_find_shared_dpll(crtc, crtc_state, |
714 | DPLL_ID_WRPLL1, DPLL_ID_WRPLL2); | 714 | DPLL_ID_WRPLL1, DPLL_ID_WRPLL2); |
715 | 715 | ||
716 | } else if (encoder->type == INTEL_OUTPUT_DISPLAYPORT || | 716 | } else if (encoder->type == INTEL_OUTPUT_DP || |
717 | encoder->type == INTEL_OUTPUT_DP_MST || | 717 | encoder->type == INTEL_OUTPUT_DP_MST || |
718 | encoder->type == INTEL_OUTPUT_EDP) { | 718 | encoder->type == INTEL_OUTPUT_EDP) { |
719 | enum intel_dpll_id pll_id; | 719 | enum intel_dpll_id pll_id; |
@@ -856,7 +856,11 @@ static void skl_ddi_pll_enable(struct drm_i915_private *dev_priv, | |||
856 | I915_WRITE(regs[pll->id].ctl, | 856 | I915_WRITE(regs[pll->id].ctl, |
857 | I915_READ(regs[pll->id].ctl) | LCPLL_PLL_ENABLE); | 857 | I915_READ(regs[pll->id].ctl) | LCPLL_PLL_ENABLE); |
858 | 858 | ||
859 | if (wait_for(I915_READ(DPLL_STATUS) & DPLL_LOCK(pll->id), 5)) | 859 | if (intel_wait_for_register(dev_priv, |
860 | DPLL_STATUS, | ||
861 | DPLL_LOCK(pll->id), | ||
862 | DPLL_LOCK(pll->id), | ||
863 | 5)) | ||
860 | DRM_ERROR("DPLL %d not locked\n", pll->id); | 864 | DRM_ERROR("DPLL %d not locked\n", pll->id); |
861 | } | 865 | } |
862 | 866 | ||
@@ -1222,7 +1226,7 @@ skl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, | |||
1222 | DPLL_CFGCR2_KDIV(wrpll_params.kdiv) | | 1226 | DPLL_CFGCR2_KDIV(wrpll_params.kdiv) | |
1223 | DPLL_CFGCR2_PDIV(wrpll_params.pdiv) | | 1227 | DPLL_CFGCR2_PDIV(wrpll_params.pdiv) | |
1224 | wrpll_params.central_freq; | 1228 | wrpll_params.central_freq; |
1225 | } else if (encoder->type == INTEL_OUTPUT_DISPLAYPORT || | 1229 | } else if (encoder->type == INTEL_OUTPUT_DP || |
1226 | encoder->type == INTEL_OUTPUT_DP_MST || | 1230 | encoder->type == INTEL_OUTPUT_DP_MST || |
1227 | encoder->type == INTEL_OUTPUT_EDP) { | 1231 | encoder->type == INTEL_OUTPUT_EDP) { |
1228 | switch (crtc_state->port_clock / 2) { | 1232 | switch (crtc_state->port_clock / 2) { |
@@ -1374,8 +1378,8 @@ static void bxt_ddi_pll_enable(struct drm_i915_private *dev_priv, | |||
1374 | I915_WRITE(BXT_PORT_PLL_ENABLE(port), temp); | 1378 | I915_WRITE(BXT_PORT_PLL_ENABLE(port), temp); |
1375 | POSTING_READ(BXT_PORT_PLL_ENABLE(port)); | 1379 | POSTING_READ(BXT_PORT_PLL_ENABLE(port)); |
1376 | 1380 | ||
1377 | if (wait_for_atomic_us((I915_READ(BXT_PORT_PLL_ENABLE(port)) & | 1381 | if (wait_for_us((I915_READ(BXT_PORT_PLL_ENABLE(port)) & PORT_PLL_LOCK), |
1378 | PORT_PLL_LOCK), 200)) | 1382 | 200)) |
1379 | DRM_ERROR("PLL %d not locked\n", port); | 1383 | DRM_ERROR("PLL %d not locked\n", port); |
1380 | 1384 | ||
1381 | /* | 1385 | /* |
@@ -1530,7 +1534,7 @@ bxt_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, | |||
1530 | clk_div.m2_frac_en = clk_div.m2_frac != 0; | 1534 | clk_div.m2_frac_en = clk_div.m2_frac != 0; |
1531 | 1535 | ||
1532 | vco = best_clock.vco; | 1536 | vco = best_clock.vco; |
1533 | } else if (encoder->type == INTEL_OUTPUT_DISPLAYPORT || | 1537 | } else if (encoder->type == INTEL_OUTPUT_DP || |
1534 | encoder->type == INTEL_OUTPUT_EDP) { | 1538 | encoder->type == INTEL_OUTPUT_EDP) { |
1535 | int i; | 1539 | int i; |
1536 | 1540 | ||
@@ -1632,7 +1636,7 @@ static const struct intel_shared_dpll_funcs bxt_ddi_pll_funcs = { | |||
1632 | 1636 | ||
1633 | static void intel_ddi_pll_init(struct drm_device *dev) | 1637 | static void intel_ddi_pll_init(struct drm_device *dev) |
1634 | { | 1638 | { |
1635 | struct drm_i915_private *dev_priv = dev->dev_private; | 1639 | struct drm_i915_private *dev_priv = to_i915(dev); |
1636 | 1640 | ||
1637 | if (INTEL_GEN(dev_priv) < 9) { | 1641 | if (INTEL_GEN(dev_priv) < 9) { |
1638 | uint32_t val = I915_READ(LCPLL_CTL); | 1642 | uint32_t val = I915_READ(LCPLL_CTL); |
@@ -1719,7 +1723,7 @@ static const struct intel_dpll_mgr bxt_pll_mgr = { | |||
1719 | 1723 | ||
1720 | void intel_shared_dpll_init(struct drm_device *dev) | 1724 | void intel_shared_dpll_init(struct drm_device *dev) |
1721 | { | 1725 | { |
1722 | struct drm_i915_private *dev_priv = dev->dev_private; | 1726 | struct drm_i915_private *dev_priv = to_i915(dev); |
1723 | const struct intel_dpll_mgr *dpll_mgr = NULL; | 1727 | const struct intel_dpll_mgr *dpll_mgr = NULL; |
1724 | const struct dpll_info *dpll_info; | 1728 | const struct dpll_info *dpll_info; |
1725 | int i; | 1729 | int i; |