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path: root/drivers/gpu/drm/i915/intel_dp_mst.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp_mst.c')
-rw-r--r--drivers/gpu/drm/i915/intel_dp_mst.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index 7ada76c5ecc5..0639275fc471 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -40,7 +40,7 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
40 struct drm_atomic_state *state; 40 struct drm_atomic_state *state;
41 int bpp, i; 41 int bpp, i;
42 int lane_count, slots; 42 int lane_count, slots;
43 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 43 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
44 struct drm_connector *drm_connector; 44 struct drm_connector *drm_connector;
45 struct intel_connector *connector, *found = NULL; 45 struct intel_connector *connector, *found = NULL;
46 struct drm_connector_state *connector_state; 46 struct drm_connector_state *connector_state;
@@ -78,7 +78,7 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
78 return false; 78 return false;
79 } 79 }
80 80
81 mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp); 81 mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
82 82
83 pipe_config->pbn = mst_pbn; 83 pipe_config->pbn = mst_pbn;
84 slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn); 84 slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
@@ -188,7 +188,6 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
188 188
189 189
190 intel_dp_start_link_train(intel_dp); 190 intel_dp_start_link_train(intel_dp);
191 intel_dp_complete_link_train(intel_dp);
192 intel_dp_stop_link_train(intel_dp); 191 intel_dp_stop_link_train(intel_dp);
193 } 192 }
194 193