diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 63b6722d4285..2151d13772b8 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -344,6 +344,8 @@ intel_dp_aux_ch(struct intel_dp *intel_dp, | |||
344 | else | 344 | else |
345 | precharge = 5; | 345 | precharge = 5; |
346 | 346 | ||
347 | intel_aux_display_runtime_get(dev_priv); | ||
348 | |||
347 | /* Try to wait for any previous AUX channel activity */ | 349 | /* Try to wait for any previous AUX channel activity */ |
348 | for (try = 0; try < 3; try++) { | 350 | for (try = 0; try < 3; try++) { |
349 | status = I915_READ_NOTRACE(ch_ctl); | 351 | status = I915_READ_NOTRACE(ch_ctl); |
@@ -434,6 +436,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp, | |||
434 | ret = recv_bytes; | 436 | ret = recv_bytes; |
435 | out: | 437 | out: |
436 | pm_qos_update_request(&dev_priv->pm_qos, PM_QOS_DEFAULT_VALUE); | 438 | pm_qos_update_request(&dev_priv->pm_qos, PM_QOS_DEFAULT_VALUE); |
439 | intel_aux_display_runtime_put(dev_priv); | ||
437 | 440 | ||
438 | return ret; | 441 | return ret; |
439 | } | 442 | } |
@@ -2326,7 +2329,6 @@ intel_dp_start_link_train(struct intel_dp *intel_dp) | |||
2326 | struct drm_device *dev = encoder->dev; | 2329 | struct drm_device *dev = encoder->dev; |
2327 | int i; | 2330 | int i; |
2328 | uint8_t voltage; | 2331 | uint8_t voltage; |
2329 | bool clock_recovery = false; | ||
2330 | int voltage_tries, loop_tries; | 2332 | int voltage_tries, loop_tries; |
2331 | uint32_t DP = intel_dp->DP; | 2333 | uint32_t DP = intel_dp->DP; |
2332 | 2334 | ||
@@ -2344,7 +2346,6 @@ intel_dp_start_link_train(struct intel_dp *intel_dp) | |||
2344 | voltage = 0xff; | 2346 | voltage = 0xff; |
2345 | voltage_tries = 0; | 2347 | voltage_tries = 0; |
2346 | loop_tries = 0; | 2348 | loop_tries = 0; |
2347 | clock_recovery = false; | ||
2348 | for (;;) { | 2349 | for (;;) { |
2349 | /* Use intel_dp->train_set[0] to set the voltage and pre emphasis values */ | 2350 | /* Use intel_dp->train_set[0] to set the voltage and pre emphasis values */ |
2350 | uint8_t link_status[DP_LINK_STATUS_SIZE]; | 2351 | uint8_t link_status[DP_LINK_STATUS_SIZE]; |
@@ -2365,7 +2366,6 @@ intel_dp_start_link_train(struct intel_dp *intel_dp) | |||
2365 | 2366 | ||
2366 | if (drm_dp_clock_recovery_ok(link_status, intel_dp->lane_count)) { | 2367 | if (drm_dp_clock_recovery_ok(link_status, intel_dp->lane_count)) { |
2367 | DRM_DEBUG_KMS("clock recovery OK\n"); | 2368 | DRM_DEBUG_KMS("clock recovery OK\n"); |
2368 | clock_recovery = true; | ||
2369 | break; | 2369 | break; |
2370 | } | 2370 | } |
2371 | 2371 | ||