1 files changed, 112 insertions, 146 deletions

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 3c2293bd24bf..9df331b3305b 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -213,6 +213,81 @@ intel_dp_downstream_max_dotclock(struct intel_dp *intel_dp)
         return max_dotclk;
 }
 
+static int
+intel_dp_sink_rates(struct intel_dp *intel_dp, const int **sink_rates)
+{
+        if (intel_dp->num_sink_rates) {
+                *sink_rates = intel_dp->sink_rates;
+                return intel_dp->num_sink_rates;
+        }
+
+        *sink_rates = default_rates;
+
+        return (intel_dp_max_link_bw(intel_dp) >> 3) + 1;
+}
+
+static int
+intel_dp_source_rates(struct intel_dp *intel_dp, const int **source_rates)
+{
+        struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+        struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
+        int size;
+
+        if (IS_BROXTON(dev_priv)) {
+                *source_rates = bxt_rates;
+                size = ARRAY_SIZE(bxt_rates);
+        } else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
+                *source_rates = skl_rates;
+                size = ARRAY_SIZE(skl_rates);
+        } else {
+                *source_rates = default_rates;
+                size = ARRAY_SIZE(default_rates);
+        }
+
+        /* This depends on the fact that 5.4 is last value in the array */
+        if (!intel_dp_source_supports_hbr2(intel_dp))
+                size--;
+
+        return size;
+}
+
+static int intersect_rates(const int *source_rates, int source_len,
+                           const int *sink_rates, int sink_len,
+                           int *common_rates)
+{
+        int i = 0, j = 0, k = 0;
+
+        while (i < source_len && j < sink_len) {
+                if (source_rates[i] == sink_rates[j]) {
+                        if (WARN_ON(k >= DP_MAX_SUPPORTED_RATES))
+                                return k;
+                        common_rates[k] = source_rates[i];
+                        ++k;
+                        ++i;
+                        ++j;
+                } else if (source_rates[i] < sink_rates[j]) {
+                        ++i;
+                } else {
+                        ++j;
+                }
+        }
+        return k;
+}
+
+static int intel_dp_common_rates(struct intel_dp *intel_dp,
+                                 int *common_rates)
+{
+        const int *source_rates, *sink_rates;
+        int source_len, sink_len;
+
+        sink_len = intel_dp_sink_rates(intel_dp, &sink_rates);
+        source_len = intel_dp_source_rates(intel_dp, &source_rates);
+
+        return intersect_rates(source_rates, source_len,
+                               sink_rates, sink_len,
+                               common_rates);
+}
+
 static enum drm_mode_status
 intel_dp_mode_valid(struct drm_connector *connector,
                     struct drm_display_mode *mode)
@@ -320,8 +395,7 @@ static void
 vlv_power_sequencer_kick(struct intel_dp *intel_dp)
 {
         struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-        struct drm_device *dev = intel_dig_port->base.base.dev;
-        struct drm_i915_private *dev_priv = to_i915(dev);
+        struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
         enum pipe pipe = intel_dp->pps_pipe;
         bool pll_enabled, release_cl_override = false;
         enum dpio_phy phy = DPIO_PHY(pipe);
@@ -359,7 +433,7 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp)
                 release_cl_override = IS_CHERRYVIEW(dev_priv) &&
                         !chv_phy_powergate_ch(dev_priv, phy, ch, true);
 
-                if (vlv_force_pll_on(dev, pipe, IS_CHERRYVIEW(dev_priv) ?
+                if (vlv_force_pll_on(dev_priv, pipe, IS_CHERRYVIEW(dev_priv) ?
                                      &chv_dpll[0].dpll : &vlv_dpll[0].dpll)) {
                         DRM_ERROR("Failed to force on pll for pipe %c!\n",
                                   pipe_name(pipe));
@@ -383,7 +457,7 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp)
         POSTING_READ(intel_dp->output_reg);
 
         if (!pll_enabled) {
-                vlv_force_pll_off(dev, pipe);
+                vlv_force_pll_off(dev_priv, pipe);
 
                 if (release_cl_override)
                         chv_phy_powergate_ch(dev_priv, phy, ch, false);
@@ -1291,19 +1365,6 @@ intel_dp_aux_init(struct intel_dp *intel_dp)
         intel_dp->aux.transfer = intel_dp_aux_transfer;
 }
 
-static int
-intel_dp_sink_rates(struct intel_dp *intel_dp, const int **sink_rates)
-{
-        if (intel_dp->num_sink_rates) {
-                *sink_rates = intel_dp->sink_rates;
-                return intel_dp->num_sink_rates;
-        }
-
-        *sink_rates = default_rates;
-
-        return (intel_dp_max_link_bw(intel_dp) >> 3) + 1;
-}
-
 bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp)
 {
         struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
@@ -1316,31 +1377,6 @@ bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp)
                 return false;
 }
 
-static int
-intel_dp_source_rates(struct intel_dp *intel_dp, const int **source_rates)
-{
-        struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-        struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
-        int size;
-
-        if (IS_BROXTON(dev_priv)) {
-                *source_rates = bxt_rates;
-                size = ARRAY_SIZE(bxt_rates);
-        } else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
-                *source_rates = skl_rates;
-                size = ARRAY_SIZE(skl_rates);
-        } else {
-                *source_rates = default_rates;
-                size = ARRAY_SIZE(default_rates);
-        }
-
-        /* This depends on the fact that 5.4 is last value in the array */
-        if (!intel_dp_source_supports_hbr2(intel_dp))
-                size--;
-
-        return size;
-}
-
 static void
 intel_dp_set_clock(struct intel_encoder *encoder,
                    struct intel_crtc_state *pipe_config)
@@ -1375,43 +1411,6 @@ intel_dp_set_clock(struct intel_encoder *encoder,
         }
 }
 
-static int intersect_rates(const int *source_rates, int source_len,
-                           const int *sink_rates, int sink_len,
-                           int *common_rates)
-{
-        int i = 0, j = 0, k = 0;
-
-        while (i < source_len && j < sink_len) {
-                if (source_rates[i] == sink_rates[j]) {
-                        if (WARN_ON(k >= DP_MAX_SUPPORTED_RATES))
-                                return k;
-                        common_rates[k] = source_rates[i];
-                        ++k;
-                        ++i;
-                        ++j;
-                } else if (source_rates[i] < sink_rates[j]) {
-                        ++i;
-                } else {
-                        ++j;
-                }
-        }
-        return k;
-}
-
-static int intel_dp_common_rates(struct intel_dp *intel_dp,
-                                 int *common_rates)
-{
-        const int *source_rates, *sink_rates;
-        int source_len, sink_len;
-
-        sink_len = intel_dp_sink_rates(intel_dp, &sink_rates);
-        source_len = intel_dp_source_rates(intel_dp, &source_rates);
-
-        return intersect_rates(source_rates, source_len,
-                               sink_rates, sink_len,
-                               common_rates);
-}
-
 static void snprintf_int_array(char *str, size_t len,
                                const int *array, int nelem)
 {
@@ -1451,40 +1450,35 @@ static void intel_dp_print_rates(struct intel_dp *intel_dp)
         DRM_DEBUG_KMS("common rates: %s\n", str);
 }
 
-static void intel_dp_print_hw_revision(struct intel_dp *intel_dp)
+bool
+__intel_dp_read_desc(struct intel_dp *intel_dp, struct intel_dp_desc *desc)
 {
-        uint8_t rev;
-        int len;
-
-        if ((drm_debug & DRM_UT_KMS) == 0)
-                return;
+        u32 base = drm_dp_is_branch(intel_dp->dpcd) ? DP_BRANCH_OUI :
+                                                      DP_SINK_OUI;
 
-        if (!drm_dp_is_branch(intel_dp->dpcd))
-                return;
-
-        len = drm_dp_dpcd_read(&intel_dp->aux, DP_BRANCH_HW_REV, &rev, 1);
-        if (len < 0)
-                return;
-
-        DRM_DEBUG_KMS("sink hw revision: %d.%d\n", (rev & 0xf0) >> 4, rev & 0xf);
+        return drm_dp_dpcd_read(&intel_dp->aux, base, desc, sizeof(*desc)) ==
+               sizeof(*desc);
 }
 
-static void intel_dp_print_sw_revision(struct intel_dp *intel_dp)
+bool intel_dp_read_desc(struct intel_dp *intel_dp)
 {
-        uint8_t rev[2];
-        int len;
+        struct intel_dp_desc *desc = &intel_dp->desc;
+        bool oui_sup = intel_dp->dpcd[DP_DOWN_STREAM_PORT_COUNT] &
+                       DP_OUI_SUPPORT;
+        int dev_id_len;
 
-        if ((drm_debug & DRM_UT_KMS) == 0)
-                return;
-
-        if (!drm_dp_is_branch(intel_dp->dpcd))
-                return;
+        if (!__intel_dp_read_desc(intel_dp, desc))
+                return false;
 
-        len = drm_dp_dpcd_read(&intel_dp->aux, DP_BRANCH_SW_REV, &rev, 2);
-        if (len < 0)
-                return;
+        dev_id_len = strnlen(desc->device_id, sizeof(desc->device_id));
+        DRM_DEBUG_KMS("DP %s: OUI %*phD%s dev-ID %*pE HW-rev %d.%d SW-rev %d.%d\n",
+                      drm_dp_is_branch(intel_dp->dpcd) ? "branch" : "sink",
+                      (int)sizeof(desc->oui), desc->oui, oui_sup ? "" : "(NS)",
+                      dev_id_len, desc->device_id,
+                      desc->hw_rev >> 4, desc->hw_rev & 0xf,
+                      desc->sw_major_rev, desc->sw_minor_rev);
 
-        DRM_DEBUG_KMS("sink sw revision: %d.%d\n", rev[0], rev[1]);
+        return true;
 }
 
 static int rate_to_index(int find, const int *rates)
@@ -2369,7 +2363,7 @@ static void ironlake_edp_pll_on(struct intel_dp *intel_dp,
          * 2. Program DP PLL enable
          */
         if (IS_GEN5(dev_priv))
-                intel_wait_for_vblank_if_active(&dev_priv->drm, !crtc->pipe);
+                intel_wait_for_vblank_if_active(dev_priv, !crtc->pipe);
 
         intel_dp->DP |= DP_PLL_ENABLE;
 
@@ -3492,7 +3486,7 @@ intel_dp_link_down(struct intel_dp *intel_dp)
                 I915_WRITE(intel_dp->output_reg, DP);
                 POSTING_READ(intel_dp->output_reg);
 
-                intel_wait_for_vblank_if_active(&dev_priv->drm, PIPE_A);
+                intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
         }
@@ -3502,7 +3496,7 @@ intel_dp_link_down(struct intel_dp *intel_dp)
         intel_dp->DP = DP;
 }
 
-static bool
+bool
 intel_dp_read_dpcd(struct intel_dp *intel_dp)
 {
         if (drm_dp_dpcd_read(&intel_dp->aux, 0x000, intel_dp->dpcd,
@@ -3526,6 +3520,8 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
         if (!intel_dp_read_dpcd(intel_dp))
                 return false;
 
+        intel_dp_read_desc(intel_dp);
+
         if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11)
                 dev_priv->no_aux_handshake = intel_dp->dpcd[DP_MAX_DOWNSPREAD] &
                         DP_NO_AUX_HANDSHAKE_LINK_TRAINING;
@@ -3627,23 +3623,6 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
         return true;
 }
 
-static void
-intel_dp_probe_oui(struct intel_dp *intel_dp)
-{
-        u8 buf[3];
-
-        if (!(intel_dp->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT))
-                return;
-
-        if (drm_dp_dpcd_read(&intel_dp->aux, DP_SINK_OUI, buf, 3) == 3)
-                DRM_DEBUG_KMS("Sink OUI: %02hx%02hx%02hx\n",
-                              buf[0], buf[1], buf[2]);
-
-        if (drm_dp_dpcd_read(&intel_dp->aux, DP_BRANCH_OUI, buf, 3) == 3)
-                DRM_DEBUG_KMS("Branch OUI: %02hx%02hx%02hx\n",
-                              buf[0], buf[1], buf[2]);
-}
-
 static bool
 intel_dp_can_mst(struct intel_dp *intel_dp)
 {
@@ -3687,7 +3666,7 @@ intel_dp_configure_mst(struct intel_dp *intel_dp)
 static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp)
 {
         struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-        struct drm_device *dev = dig_port->base.base.dev;
+        struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
         struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc);
         u8 buf;
         int ret = 0;
@@ -3708,7 +3687,7 @@ static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp)
         }
 
         do {
-                intel_wait_for_vblank(dev, intel_crtc->pipe);
+                intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
 
                 if (drm_dp_dpcd_readb(&intel_dp->aux,
                                       DP_TEST_SINK_MISC, &buf) < 0) {
@@ -3731,7 +3710,7 @@ static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp)
 static int intel_dp_sink_crc_start(struct intel_dp *intel_dp)
 {
         struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-        struct drm_device *dev = dig_port->base.base.dev;
+        struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
         struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc);
         u8 buf;
         int ret;
@@ -3759,14 +3738,14 @@ static int intel_dp_sink_crc_start(struct intel_dp *intel_dp)
                 return -EIO;
         }
 
-        intel_wait_for_vblank(dev, intel_crtc->pipe);
+        intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
         return 0;
 }
 
 int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
 {
         struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-        struct drm_device *dev = dig_port->base.base.dev;
+        struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
         struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc);
         u8 buf;
         int count, ret;
@@ -3777,7 +3756,7 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
                 return ret;
 
         do {
-                intel_wait_for_vblank(dev, intel_crtc->pipe);
+                intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
 
                 if (drm_dp_dpcd_readb(&intel_dp->aux,
                                       DP_TEST_SINK_MISC, &buf) < 0) {
@@ -4010,7 +3989,7 @@ intel_dp_retrain_link(struct intel_dp *intel_dp)
         intel_dp_stop_link_train(intel_dp);
 
         /* Keep underrun reporting disabled until things are stable */
-        intel_wait_for_vblank(&dev_priv->drm, crtc->pipe);
+        intel_wait_for_vblank(dev_priv, crtc->pipe);
 
         intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, true);
         if (crtc->config->has_pch_encoder)
@@ -4422,10 +4401,7 @@ intel_dp_long_pulse(struct intel_connector *intel_connector)
 
         intel_dp_print_rates(intel_dp);
 
-        intel_dp_probe_oui(intel_dp);
-
-        intel_dp_print_hw_revision(intel_dp);
-        intel_dp_print_sw_revision(intel_dp);
+        intel_dp_read_desc(intel_dp);
 
         intel_dp_configure_mst(intel_dp);
 
@@ -4489,21 +4465,11 @@ static enum drm_connector_status
 intel_dp_detect(struct drm_connector *connector, bool force)
 {
         struct intel_dp *intel_dp = intel_attached_dp(connector);
-        struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-        struct intel_encoder *intel_encoder = &intel_dig_port->base;
         enum drm_connector_status status = connector->status;
 
         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
                       connector->base.id, connector->name);
 
-        if (intel_dp->is_mst) {
-                /* MST devices are disconnected from a monitor POV */
-                intel_dp_unset_edid(intel_dp);
-                if (intel_encoder->type != INTEL_OUTPUT_EDP)
-                        intel_encoder->type = INTEL_OUTPUT_DP;
-                return connector_status_disconnected;
-        }
-
         /* If full detect is not performed yet, do a full detect */
         if (!intel_dp->detect_done)
                 status = intel_dp_long_pulse(intel_dp->attached_connector);