diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 142 |
1 files changed, 92 insertions, 50 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 8719c1a9d1ce..577b30dde45b 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -1022,7 +1022,7 @@ bool intel_crtc_active(struct intel_crtc *crtc) | |||
1022 | * We can ditch the adjusted_mode.crtc_clock check as soon | 1022 | * We can ditch the adjusted_mode.crtc_clock check as soon |
1023 | * as Haswell has gained clock readout/fastboot support. | 1023 | * as Haswell has gained clock readout/fastboot support. |
1024 | * | 1024 | * |
1025 | * We can ditch the crtc->primary->fb check as soon as we can | 1025 | * We can ditch the crtc->primary->state->fb check as soon as we can |
1026 | * properly reconstruct framebuffers. | 1026 | * properly reconstruct framebuffers. |
1027 | * | 1027 | * |
1028 | * FIXME: The intel_crtc->active here should be switched to | 1028 | * FIXME: The intel_crtc->active here should be switched to |
@@ -2756,10 +2756,10 @@ intel_set_plane_visible(struct intel_crtc_state *crtc_state, | |||
2756 | 2756 | ||
2757 | /* FIXME pre-g4x don't work like this */ | 2757 | /* FIXME pre-g4x don't work like this */ |
2758 | if (visible) { | 2758 | if (visible) { |
2759 | crtc_state->base.plane_mask |= BIT(drm_plane_index(&plane->base)); | 2759 | crtc_state->base.plane_mask |= drm_plane_mask(&plane->base); |
2760 | crtc_state->active_planes |= BIT(plane->id); | 2760 | crtc_state->active_planes |= BIT(plane->id); |
2761 | } else { | 2761 | } else { |
2762 | crtc_state->base.plane_mask &= ~BIT(drm_plane_index(&plane->base)); | 2762 | crtc_state->base.plane_mask &= ~drm_plane_mask(&plane->base); |
2763 | crtc_state->active_planes &= ~BIT(plane->id); | 2763 | crtc_state->active_planes &= ~BIT(plane->id); |
2764 | } | 2764 | } |
2765 | 2765 | ||
@@ -2882,9 +2882,8 @@ valid_fb: | |||
2882 | if (i915_gem_object_is_tiled(obj)) | 2882 | if (i915_gem_object_is_tiled(obj)) |
2883 | dev_priv->preserve_bios_swizzle = true; | 2883 | dev_priv->preserve_bios_swizzle = true; |
2884 | 2884 | ||
2885 | drm_framebuffer_get(fb); | 2885 | plane_state->fb = fb; |
2886 | primary->fb = primary->state->fb = fb; | 2886 | plane_state->crtc = &intel_crtc->base; |
2887 | primary->crtc = primary->state->crtc = &intel_crtc->base; | ||
2888 | 2887 | ||
2889 | intel_set_plane_visible(to_intel_crtc_state(crtc_state), | 2888 | intel_set_plane_visible(to_intel_crtc_state(crtc_state), |
2890 | to_intel_plane_state(plane_state), | 2889 | to_intel_plane_state(plane_state), |
@@ -3658,7 +3657,7 @@ u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state, | |||
3658 | plane_color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE; | 3657 | plane_color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE; |
3659 | plane_color_ctl |= glk_plane_color_ctl_alpha(fb->format->format); | 3658 | plane_color_ctl |= glk_plane_color_ctl_alpha(fb->format->format); |
3660 | 3659 | ||
3661 | if (intel_format_is_yuv(fb->format->format)) { | 3660 | if (fb->format->is_yuv) { |
3662 | if (plane_state->base.color_encoding == DRM_COLOR_YCBCR_BT709) | 3661 | if (plane_state->base.color_encoding == DRM_COLOR_YCBCR_BT709) |
3663 | plane_color_ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709; | 3662 | plane_color_ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709; |
3664 | else | 3663 | else |
@@ -11899,7 +11898,7 @@ verify_single_dpll_state(struct drm_i915_private *dev_priv, | |||
11899 | struct drm_crtc_state *new_state) | 11898 | struct drm_crtc_state *new_state) |
11900 | { | 11899 | { |
11901 | struct intel_dpll_hw_state dpll_hw_state; | 11900 | struct intel_dpll_hw_state dpll_hw_state; |
11902 | unsigned crtc_mask; | 11901 | unsigned int crtc_mask; |
11903 | bool active; | 11902 | bool active; |
11904 | 11903 | ||
11905 | memset(&dpll_hw_state, 0, sizeof(dpll_hw_state)); | 11904 | memset(&dpll_hw_state, 0, sizeof(dpll_hw_state)); |
@@ -11926,7 +11925,7 @@ verify_single_dpll_state(struct drm_i915_private *dev_priv, | |||
11926 | return; | 11925 | return; |
11927 | } | 11926 | } |
11928 | 11927 | ||
11929 | crtc_mask = 1 << drm_crtc_index(crtc); | 11928 | crtc_mask = drm_crtc_mask(crtc); |
11930 | 11929 | ||
11931 | if (new_state->active) | 11930 | if (new_state->active) |
11932 | I915_STATE_WARN(!(pll->active_mask & crtc_mask), | 11931 | I915_STATE_WARN(!(pll->active_mask & crtc_mask), |
@@ -11961,7 +11960,7 @@ verify_shared_dpll_state(struct drm_device *dev, struct drm_crtc *crtc, | |||
11961 | 11960 | ||
11962 | if (old_state->shared_dpll && | 11961 | if (old_state->shared_dpll && |
11963 | old_state->shared_dpll != new_state->shared_dpll) { | 11962 | old_state->shared_dpll != new_state->shared_dpll) { |
11964 | unsigned crtc_mask = 1 << drm_crtc_index(crtc); | 11963 | unsigned int crtc_mask = drm_crtc_mask(crtc); |
11965 | struct intel_shared_dpll *pll = old_state->shared_dpll; | 11964 | struct intel_shared_dpll *pll = old_state->shared_dpll; |
11966 | 11965 | ||
11967 | I915_STATE_WARN(pll->active_mask & crtc_mask, | 11966 | I915_STATE_WARN(pll->active_mask & crtc_mask, |
@@ -13305,8 +13304,17 @@ void intel_plane_destroy(struct drm_plane *plane) | |||
13305 | kfree(to_intel_plane(plane)); | 13304 | kfree(to_intel_plane(plane)); |
13306 | } | 13305 | } |
13307 | 13306 | ||
13308 | static bool i8xx_mod_supported(uint32_t format, uint64_t modifier) | 13307 | static bool i8xx_plane_format_mod_supported(struct drm_plane *_plane, |
13308 | u32 format, u64 modifier) | ||
13309 | { | 13309 | { |
13310 | switch (modifier) { | ||
13311 | case DRM_FORMAT_MOD_LINEAR: | ||
13312 | case I915_FORMAT_MOD_X_TILED: | ||
13313 | break; | ||
13314 | default: | ||
13315 | return false; | ||
13316 | } | ||
13317 | |||
13310 | switch (format) { | 13318 | switch (format) { |
13311 | case DRM_FORMAT_C8: | 13319 | case DRM_FORMAT_C8: |
13312 | case DRM_FORMAT_RGB565: | 13320 | case DRM_FORMAT_RGB565: |
@@ -13319,8 +13327,17 @@ static bool i8xx_mod_supported(uint32_t format, uint64_t modifier) | |||
13319 | } | 13327 | } |
13320 | } | 13328 | } |
13321 | 13329 | ||
13322 | static bool i965_mod_supported(uint32_t format, uint64_t modifier) | 13330 | static bool i965_plane_format_mod_supported(struct drm_plane *_plane, |
13331 | u32 format, u64 modifier) | ||
13323 | { | 13332 | { |
13333 | switch (modifier) { | ||
13334 | case DRM_FORMAT_MOD_LINEAR: | ||
13335 | case I915_FORMAT_MOD_X_TILED: | ||
13336 | break; | ||
13337 | default: | ||
13338 | return false; | ||
13339 | } | ||
13340 | |||
13324 | switch (format) { | 13341 | switch (format) { |
13325 | case DRM_FORMAT_C8: | 13342 | case DRM_FORMAT_C8: |
13326 | case DRM_FORMAT_RGB565: | 13343 | case DRM_FORMAT_RGB565: |
@@ -13335,8 +13352,26 @@ static bool i965_mod_supported(uint32_t format, uint64_t modifier) | |||
13335 | } | 13352 | } |
13336 | } | 13353 | } |
13337 | 13354 | ||
13338 | static bool skl_mod_supported(uint32_t format, uint64_t modifier) | 13355 | static bool skl_plane_format_mod_supported(struct drm_plane *_plane, |
13356 | u32 format, u64 modifier) | ||
13339 | { | 13357 | { |
13358 | struct intel_plane *plane = to_intel_plane(_plane); | ||
13359 | |||
13360 | switch (modifier) { | ||
13361 | case DRM_FORMAT_MOD_LINEAR: | ||
13362 | case I915_FORMAT_MOD_X_TILED: | ||
13363 | case I915_FORMAT_MOD_Y_TILED: | ||
13364 | case I915_FORMAT_MOD_Yf_TILED: | ||
13365 | break; | ||
13366 | case I915_FORMAT_MOD_Y_TILED_CCS: | ||
13367 | case I915_FORMAT_MOD_Yf_TILED_CCS: | ||
13368 | if (!plane->has_ccs) | ||
13369 | return false; | ||
13370 | break; | ||
13371 | default: | ||
13372 | return false; | ||
13373 | } | ||
13374 | |||
13340 | switch (format) { | 13375 | switch (format) { |
13341 | case DRM_FORMAT_XRGB8888: | 13376 | case DRM_FORMAT_XRGB8888: |
13342 | case DRM_FORMAT_XBGR8888: | 13377 | case DRM_FORMAT_XBGR8888: |
@@ -13368,38 +13403,36 @@ static bool skl_mod_supported(uint32_t format, uint64_t modifier) | |||
13368 | } | 13403 | } |
13369 | } | 13404 | } |
13370 | 13405 | ||
13371 | static bool intel_primary_plane_format_mod_supported(struct drm_plane *plane, | 13406 | static bool intel_cursor_format_mod_supported(struct drm_plane *_plane, |
13372 | uint32_t format, | 13407 | u32 format, u64 modifier) |
13373 | uint64_t modifier) | ||
13374 | { | 13408 | { |
13375 | struct drm_i915_private *dev_priv = to_i915(plane->dev); | 13409 | return modifier == DRM_FORMAT_MOD_LINEAR && |
13376 | 13410 | format == DRM_FORMAT_ARGB8888; | |
13377 | if (WARN_ON(modifier == DRM_FORMAT_MOD_INVALID)) | ||
13378 | return false; | ||
13379 | |||
13380 | if ((modifier >> 56) != DRM_FORMAT_MOD_VENDOR_INTEL && | ||
13381 | modifier != DRM_FORMAT_MOD_LINEAR) | ||
13382 | return false; | ||
13383 | |||
13384 | if (INTEL_GEN(dev_priv) >= 9) | ||
13385 | return skl_mod_supported(format, modifier); | ||
13386 | else if (INTEL_GEN(dev_priv) >= 4) | ||
13387 | return i965_mod_supported(format, modifier); | ||
13388 | else | ||
13389 | return i8xx_mod_supported(format, modifier); | ||
13390 | } | 13411 | } |
13391 | 13412 | ||
13392 | static bool intel_cursor_plane_format_mod_supported(struct drm_plane *plane, | 13413 | static struct drm_plane_funcs skl_plane_funcs = { |
13393 | uint32_t format, | 13414 | .update_plane = drm_atomic_helper_update_plane, |
13394 | uint64_t modifier) | 13415 | .disable_plane = drm_atomic_helper_disable_plane, |
13395 | { | 13416 | .destroy = intel_plane_destroy, |
13396 | if (WARN_ON(modifier == DRM_FORMAT_MOD_INVALID)) | 13417 | .atomic_get_property = intel_plane_atomic_get_property, |
13397 | return false; | 13418 | .atomic_set_property = intel_plane_atomic_set_property, |
13419 | .atomic_duplicate_state = intel_plane_duplicate_state, | ||
13420 | .atomic_destroy_state = intel_plane_destroy_state, | ||
13421 | .format_mod_supported = skl_plane_format_mod_supported, | ||
13422 | }; | ||
13398 | 13423 | ||
13399 | return modifier == DRM_FORMAT_MOD_LINEAR && format == DRM_FORMAT_ARGB8888; | 13424 | static struct drm_plane_funcs i965_plane_funcs = { |
13400 | } | 13425 | .update_plane = drm_atomic_helper_update_plane, |
13426 | .disable_plane = drm_atomic_helper_disable_plane, | ||
13427 | .destroy = intel_plane_destroy, | ||
13428 | .atomic_get_property = intel_plane_atomic_get_property, | ||
13429 | .atomic_set_property = intel_plane_atomic_set_property, | ||
13430 | .atomic_duplicate_state = intel_plane_duplicate_state, | ||
13431 | .atomic_destroy_state = intel_plane_destroy_state, | ||
13432 | .format_mod_supported = i965_plane_format_mod_supported, | ||
13433 | }; | ||
13401 | 13434 | ||
13402 | static struct drm_plane_funcs intel_plane_funcs = { | 13435 | static struct drm_plane_funcs i8xx_plane_funcs = { |
13403 | .update_plane = drm_atomic_helper_update_plane, | 13436 | .update_plane = drm_atomic_helper_update_plane, |
13404 | .disable_plane = drm_atomic_helper_disable_plane, | 13437 | .disable_plane = drm_atomic_helper_disable_plane, |
13405 | .destroy = intel_plane_destroy, | 13438 | .destroy = intel_plane_destroy, |
@@ -13407,7 +13440,7 @@ static struct drm_plane_funcs intel_plane_funcs = { | |||
13407 | .atomic_set_property = intel_plane_atomic_set_property, | 13440 | .atomic_set_property = intel_plane_atomic_set_property, |
13408 | .atomic_duplicate_state = intel_plane_duplicate_state, | 13441 | .atomic_duplicate_state = intel_plane_duplicate_state, |
13409 | .atomic_destroy_state = intel_plane_destroy_state, | 13442 | .atomic_destroy_state = intel_plane_destroy_state, |
13410 | .format_mod_supported = intel_primary_plane_format_mod_supported, | 13443 | .format_mod_supported = i8xx_plane_format_mod_supported, |
13411 | }; | 13444 | }; |
13412 | 13445 | ||
13413 | static int | 13446 | static int |
@@ -13532,7 +13565,7 @@ static const struct drm_plane_funcs intel_cursor_plane_funcs = { | |||
13532 | .atomic_set_property = intel_plane_atomic_set_property, | 13565 | .atomic_set_property = intel_plane_atomic_set_property, |
13533 | .atomic_duplicate_state = intel_plane_duplicate_state, | 13566 | .atomic_duplicate_state = intel_plane_duplicate_state, |
13534 | .atomic_destroy_state = intel_plane_destroy_state, | 13567 | .atomic_destroy_state = intel_plane_destroy_state, |
13535 | .format_mod_supported = intel_cursor_plane_format_mod_supported, | 13568 | .format_mod_supported = intel_cursor_format_mod_supported, |
13536 | }; | 13569 | }; |
13537 | 13570 | ||
13538 | static bool i9xx_plane_has_fbc(struct drm_i915_private *dev_priv, | 13571 | static bool i9xx_plane_has_fbc(struct drm_i915_private *dev_priv, |
@@ -13590,6 +13623,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) | |||
13590 | { | 13623 | { |
13591 | struct intel_plane *primary = NULL; | 13624 | struct intel_plane *primary = NULL; |
13592 | struct intel_plane_state *state = NULL; | 13625 | struct intel_plane_state *state = NULL; |
13626 | const struct drm_plane_funcs *plane_funcs; | ||
13593 | const uint32_t *intel_primary_formats; | 13627 | const uint32_t *intel_primary_formats; |
13594 | unsigned int supported_rotations; | 13628 | unsigned int supported_rotations; |
13595 | unsigned int num_formats; | 13629 | unsigned int num_formats; |
@@ -13645,6 +13679,9 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) | |||
13645 | primary->check_plane = intel_check_primary_plane; | 13679 | primary->check_plane = intel_check_primary_plane; |
13646 | 13680 | ||
13647 | if (INTEL_GEN(dev_priv) >= 9) { | 13681 | if (INTEL_GEN(dev_priv) >= 9) { |
13682 | primary->has_ccs = skl_plane_has_ccs(dev_priv, pipe, | ||
13683 | PLANE_PRIMARY); | ||
13684 | |||
13648 | if (skl_plane_has_planar(dev_priv, pipe, PLANE_PRIMARY)) { | 13685 | if (skl_plane_has_planar(dev_priv, pipe, PLANE_PRIMARY)) { |
13649 | intel_primary_formats = skl_pri_planar_formats; | 13686 | intel_primary_formats = skl_pri_planar_formats; |
13650 | num_formats = ARRAY_SIZE(skl_pri_planar_formats); | 13687 | num_formats = ARRAY_SIZE(skl_pri_planar_formats); |
@@ -13653,7 +13690,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) | |||
13653 | num_formats = ARRAY_SIZE(skl_primary_formats); | 13690 | num_formats = ARRAY_SIZE(skl_primary_formats); |
13654 | } | 13691 | } |
13655 | 13692 | ||
13656 | if (skl_plane_has_ccs(dev_priv, pipe, PLANE_PRIMARY)) | 13693 | if (primary->has_ccs) |
13657 | modifiers = skl_format_modifiers_ccs; | 13694 | modifiers = skl_format_modifiers_ccs; |
13658 | else | 13695 | else |
13659 | modifiers = skl_format_modifiers_noccs; | 13696 | modifiers = skl_format_modifiers_noccs; |
@@ -13661,6 +13698,8 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) | |||
13661 | primary->update_plane = skl_update_plane; | 13698 | primary->update_plane = skl_update_plane; |
13662 | primary->disable_plane = skl_disable_plane; | 13699 | primary->disable_plane = skl_disable_plane; |
13663 | primary->get_hw_state = skl_plane_get_hw_state; | 13700 | primary->get_hw_state = skl_plane_get_hw_state; |
13701 | |||
13702 | plane_funcs = &skl_plane_funcs; | ||
13664 | } else if (INTEL_GEN(dev_priv) >= 4) { | 13703 | } else if (INTEL_GEN(dev_priv) >= 4) { |
13665 | intel_primary_formats = i965_primary_formats; | 13704 | intel_primary_formats = i965_primary_formats; |
13666 | num_formats = ARRAY_SIZE(i965_primary_formats); | 13705 | num_formats = ARRAY_SIZE(i965_primary_formats); |
@@ -13669,6 +13708,8 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) | |||
13669 | primary->update_plane = i9xx_update_plane; | 13708 | primary->update_plane = i9xx_update_plane; |
13670 | primary->disable_plane = i9xx_disable_plane; | 13709 | primary->disable_plane = i9xx_disable_plane; |
13671 | primary->get_hw_state = i9xx_plane_get_hw_state; | 13710 | primary->get_hw_state = i9xx_plane_get_hw_state; |
13711 | |||
13712 | plane_funcs = &i965_plane_funcs; | ||
13672 | } else { | 13713 | } else { |
13673 | intel_primary_formats = i8xx_primary_formats; | 13714 | intel_primary_formats = i8xx_primary_formats; |
13674 | num_formats = ARRAY_SIZE(i8xx_primary_formats); | 13715 | num_formats = ARRAY_SIZE(i8xx_primary_formats); |
@@ -13677,25 +13718,27 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) | |||
13677 | primary->update_plane = i9xx_update_plane; | 13718 | primary->update_plane = i9xx_update_plane; |
13678 | primary->disable_plane = i9xx_disable_plane; | 13719 | primary->disable_plane = i9xx_disable_plane; |
13679 | primary->get_hw_state = i9xx_plane_get_hw_state; | 13720 | primary->get_hw_state = i9xx_plane_get_hw_state; |
13721 | |||
13722 | plane_funcs = &i8xx_plane_funcs; | ||
13680 | } | 13723 | } |
13681 | 13724 | ||
13682 | if (INTEL_GEN(dev_priv) >= 9) | 13725 | if (INTEL_GEN(dev_priv) >= 9) |
13683 | ret = drm_universal_plane_init(&dev_priv->drm, &primary->base, | 13726 | ret = drm_universal_plane_init(&dev_priv->drm, &primary->base, |
13684 | 0, &intel_plane_funcs, | 13727 | 0, plane_funcs, |
13685 | intel_primary_formats, num_formats, | 13728 | intel_primary_formats, num_formats, |
13686 | modifiers, | 13729 | modifiers, |
13687 | DRM_PLANE_TYPE_PRIMARY, | 13730 | DRM_PLANE_TYPE_PRIMARY, |
13688 | "plane 1%c", pipe_name(pipe)); | 13731 | "plane 1%c", pipe_name(pipe)); |
13689 | else if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv)) | 13732 | else if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv)) |
13690 | ret = drm_universal_plane_init(&dev_priv->drm, &primary->base, | 13733 | ret = drm_universal_plane_init(&dev_priv->drm, &primary->base, |
13691 | 0, &intel_plane_funcs, | 13734 | 0, plane_funcs, |
13692 | intel_primary_formats, num_formats, | 13735 | intel_primary_formats, num_formats, |
13693 | modifiers, | 13736 | modifiers, |
13694 | DRM_PLANE_TYPE_PRIMARY, | 13737 | DRM_PLANE_TYPE_PRIMARY, |
13695 | "primary %c", pipe_name(pipe)); | 13738 | "primary %c", pipe_name(pipe)); |
13696 | else | 13739 | else |
13697 | ret = drm_universal_plane_init(&dev_priv->drm, &primary->base, | 13740 | ret = drm_universal_plane_init(&dev_priv->drm, &primary->base, |
13698 | 0, &intel_plane_funcs, | 13741 | 0, plane_funcs, |
13699 | intel_primary_formats, num_formats, | 13742 | intel_primary_formats, num_formats, |
13700 | modifiers, | 13743 | modifiers, |
13701 | DRM_PLANE_TYPE_PRIMARY, | 13744 | DRM_PLANE_TYPE_PRIMARY, |
@@ -15666,9 +15709,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) | |||
15666 | * rely on the connector_mask being accurate. | 15709 | * rely on the connector_mask being accurate. |
15667 | */ | 15710 | */ |
15668 | encoder->base.crtc->state->connector_mask |= | 15711 | encoder->base.crtc->state->connector_mask |= |
15669 | 1 << drm_connector_index(&connector->base); | 15712 | drm_connector_mask(&connector->base); |
15670 | encoder->base.crtc->state->encoder_mask |= | 15713 | encoder->base.crtc->state->encoder_mask |= |
15671 | 1 << drm_encoder_index(&encoder->base); | 15714 | drm_encoder_mask(&encoder->base); |
15672 | } | 15715 | } |
15673 | 15716 | ||
15674 | } else { | 15717 | } else { |
@@ -15968,8 +16011,7 @@ void intel_connector_attach_encoder(struct intel_connector *connector, | |||
15968 | struct intel_encoder *encoder) | 16011 | struct intel_encoder *encoder) |
15969 | { | 16012 | { |
15970 | connector->encoder = encoder; | 16013 | connector->encoder = encoder; |
15971 | drm_mode_connector_attach_encoder(&connector->base, | 16014 | drm_connector_attach_encoder(&connector->base, &encoder->base); |
15972 | &encoder->base); | ||
15973 | } | 16015 | } |
15974 | 16016 | ||
15975 | /* | 16017 | /* |