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path: root/drivers/gpu/drm/i915/intel_display.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c60
1 files changed, 4 insertions, 56 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6b3b65e3b36b..cddb0c692334 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11836,12 +11836,6 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc,
11836 } 11836 }
11837 11837
11838 ret = 0; 11838 ret = 0;
11839 if (dev_priv->display.compute_pipe_wm) {
11840 ret = dev_priv->display.compute_pipe_wm(intel_crtc, state);
11841 if (ret)
11842 return ret;
11843 }
11844
11845 if (INTEL_INFO(dev)->gen >= 9) { 11839 if (INTEL_INFO(dev)->gen >= 9) {
11846 if (mode_changed) 11840 if (mode_changed)
11847 ret = skl_update_scaler_crtc(pipe_config); 11841 ret = skl_update_scaler_crtc(pipe_config);
@@ -13047,45 +13041,6 @@ static int intel_modeset_checks(struct drm_atomic_state *state)
13047 return 0; 13041 return 0;
13048} 13042}
13049 13043
13050/*
13051 * Handle calculation of various watermark data at the end of the atomic check
13052 * phase. The code here should be run after the per-crtc and per-plane 'check'
13053 * handlers to ensure that all derived state has been updated.
13054 */
13055static void calc_watermark_data(struct drm_atomic_state *state)
13056{
13057 struct drm_device *dev = state->dev;
13058 struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
13059 struct drm_crtc *crtc;
13060 struct drm_crtc_state *cstate;
13061 struct drm_plane *plane;
13062 struct drm_plane_state *pstate;
13063
13064 /*
13065 * Calculate watermark configuration details now that derived
13066 * plane/crtc state is all properly updated.
13067 */
13068 drm_for_each_crtc(crtc, dev) {
13069 cstate = drm_atomic_get_existing_crtc_state(state, crtc) ?:
13070 crtc->state;
13071
13072 if (cstate->active)
13073 intel_state->wm_config.num_pipes_active++;
13074 }
13075 drm_for_each_legacy_plane(plane, dev) {
13076 pstate = drm_atomic_get_existing_plane_state(state, plane) ?:
13077 plane->state;
13078
13079 if (!to_intel_plane_state(pstate)->visible)
13080 continue;
13081
13082 intel_state->wm_config.sprites_enabled = true;
13083 if (pstate->crtc_w != pstate->src_w >> 16 ||
13084 pstate->crtc_h != pstate->src_h >> 16)
13085 intel_state->wm_config.sprites_scaled = true;
13086 }
13087}
13088
13089/** 13044/**
13090 * intel_atomic_check - validate state object 13045 * intel_atomic_check - validate state object
13091 * @dev: drm device 13046 * @dev: drm device
@@ -13094,7 +13049,6 @@ static void calc_watermark_data(struct drm_atomic_state *state)
13094static int intel_atomic_check(struct drm_device *dev, 13049static int intel_atomic_check(struct drm_device *dev,
13095 struct drm_atomic_state *state) 13050 struct drm_atomic_state *state)
13096{ 13051{
13097 struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
13098 struct drm_crtc *crtc; 13052 struct drm_crtc *crtc;
13099 struct drm_crtc_state *crtc_state; 13053 struct drm_crtc_state *crtc_state;
13100 int ret, i; 13054 int ret, i;
@@ -13158,15 +13112,10 @@ static int intel_atomic_check(struct drm_device *dev,
13158 if (ret) 13112 if (ret)
13159 return ret; 13113 return ret;
13160 } else 13114 } else
13161 intel_state->cdclk = to_i915(state->dev)->cdclk_freq; 13115 to_intel_atomic_state(state)->cdclk =
13162 13116 to_i915(state->dev)->cdclk_freq;
13163 ret = drm_atomic_helper_check_planes(state->dev, state);
13164 if (ret)
13165 return ret;
13166
13167 calc_watermark_data(state);
13168 13117
13169 return 0; 13118 return drm_atomic_helper_check_planes(state->dev, state);
13170} 13119}
13171 13120
13172/** 13121/**
@@ -13206,7 +13155,6 @@ static int intel_atomic_commit(struct drm_device *dev,
13206 return ret; 13155 return ret;
13207 13156
13208 drm_atomic_helper_swap_state(dev, state); 13157 drm_atomic_helper_swap_state(dev, state);
13209 dev_priv->wm.config = to_intel_atomic_state(state)->wm_config;
13210 13158
13211 for_each_crtc_in_state(state, crtc, crtc_state, i) { 13159 for_each_crtc_in_state(state, crtc, crtc_state, i) {
13212 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 13160 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
@@ -15220,7 +15168,7 @@ static void readout_plane_state(struct intel_crtc *crtc)
15220 struct intel_plane_state *plane_state = 15168 struct intel_plane_state *plane_state =
15221 to_intel_plane_state(primary->state); 15169 to_intel_plane_state(primary->state);
15222 15170
15223 plane_state->visible = crtc->active && 15171 plane_state->visible =
15224 primary_get_hw_state(to_intel_plane(primary)); 15172 primary_get_hw_state(to_intel_plane(primary));
15225 15173
15226 if (plane_state->visible) 15174 if (plane_state->visible)