diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ddi.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_ddi.c | 17 |
1 files changed, 5 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index aaaca906c97f..8183304c7d34 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c | |||
@@ -1423,19 +1423,16 @@ static void hsw_ddi_clock_get(struct intel_encoder *encoder, | |||
1423 | ddi_dotclock_get(pipe_config); | 1423 | ddi_dotclock_get(pipe_config); |
1424 | } | 1424 | } |
1425 | 1425 | ||
1426 | static int bxt_calc_pll_link(struct drm_i915_private *dev_priv, | 1426 | static int bxt_calc_pll_link(struct intel_crtc_state *crtc_state) |
1427 | enum intel_dpll_id pll_id) | ||
1428 | { | 1427 | { |
1429 | struct intel_shared_dpll *pll; | ||
1430 | struct intel_dpll_hw_state *state; | 1428 | struct intel_dpll_hw_state *state; |
1431 | struct dpll clock; | 1429 | struct dpll clock; |
1432 | 1430 | ||
1433 | /* For DDI ports we always use a shared PLL. */ | 1431 | /* For DDI ports we always use a shared PLL. */ |
1434 | if (WARN_ON(pll_id == DPLL_ID_PRIVATE)) | 1432 | if (WARN_ON(!crtc_state->shared_dpll)) |
1435 | return 0; | 1433 | return 0; |
1436 | 1434 | ||
1437 | pll = &dev_priv->shared_dplls[pll_id]; | 1435 | state = &crtc_state->dpll_hw_state; |
1438 | state = &pll->state.hw_state; | ||
1439 | 1436 | ||
1440 | clock.m1 = 2; | 1437 | clock.m1 = 2; |
1441 | clock.m2 = (state->pll0 & PORT_PLL_M2_MASK) << 22; | 1438 | clock.m2 = (state->pll0 & PORT_PLL_M2_MASK) << 22; |
@@ -1449,13 +1446,9 @@ static int bxt_calc_pll_link(struct drm_i915_private *dev_priv, | |||
1449 | } | 1446 | } |
1450 | 1447 | ||
1451 | static void bxt_ddi_clock_get(struct intel_encoder *encoder, | 1448 | static void bxt_ddi_clock_get(struct intel_encoder *encoder, |
1452 | struct intel_crtc_state *pipe_config) | 1449 | struct intel_crtc_state *pipe_config) |
1453 | { | 1450 | { |
1454 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); | 1451 | pipe_config->port_clock = bxt_calc_pll_link(pipe_config); |
1455 | enum port port = encoder->port; | ||
1456 | enum intel_dpll_id pll_id = port; | ||
1457 | |||
1458 | pipe_config->port_clock = bxt_calc_pll_link(dev_priv, pll_id); | ||
1459 | 1452 | ||
1460 | ddi_dotclock_get(pipe_config); | 1453 | ddi_dotclock_get(pipe_config); |
1461 | } | 1454 | } |