1 files changed, 21 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 31de7e4b1f3e..66fb8dd28225 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4315,6 +4315,7 @@
 #define   GEN6_RC_CTL_RC6_ENABLE                (1<<18)
 #define   GEN6_RC_CTL_RC1e_ENABLE               (1<<20)
 #define   GEN6_RC_CTL_RC7_ENABLE                (1<<22)
+#define   GEN7_RC_CTL_TO_MODE                   (1<<28)
 #define   GEN6_RC_CTL_EI_MODE(x)                ((x)<<27)
 #define   GEN6_RC_CTL_HW_ENABLE                 (1<<31)
 #define GEN6_RP_DOWN_TIMEOUT                    0xA010
@@ -4406,12 +4407,32 @@
 #define   IOSF_BAR_SHIFT                        1
 #define   IOSF_SB_BUSY                          (1<<0)
 #define   IOSF_PORT_PUNIT                       0x4
+#define   IOSF_PORT_NC                          0x11
 #define VLV_IOSF_DATA                           0x182104
 #define VLV_IOSF_ADDR                           0x182108
 
 #define PUNIT_OPCODE_REG_READ                   6
 #define PUNIT_OPCODE_REG_WRITE                  7
 
+#define PUNIT_REG_GPU_LFM                       0xd3
+#define PUNIT_REG_GPU_FREQ_REQ                  0xd4
+#define PUNIT_REG_GPU_FREQ_STS                  0xd8
+#define PUNIT_REG_MEDIA_TURBO_FREQ_REQ          0xdc
+
+#define PUNIT_FUSE_BUS2                         0xf6 /* bits 47:40 */
+#define PUNIT_FUSE_BUS1                         0xf5 /* bits 55:48 */
+
+#define IOSF_NC_FB_GFX_FREQ_FUSE                0x1c
+#define   FB_GFX_MAX_FREQ_FUSE_SHIFT            3
+#define   FB_GFX_MAX_FREQ_FUSE_MASK             0x000007f8
+#define   FB_GFX_FGUARANTEED_FREQ_FUSE_SHIFT    11
+#define   FB_GFX_FGUARANTEED_FREQ_FUSE_MASK     0x0007f800
+#define IOSF_NC_FB_GFX_FMAX_FUSE_HI             0x34
+#define   FB_FMAX_VMIN_FREQ_HI_MASK             0x00000007
+#define IOSF_NC_FB_GFX_FMAX_FUSE_LO             0x30
+#define   FB_FMAX_VMIN_FREQ_LO_SHIFT            27
+#define   FB_FMAX_VMIN_FREQ_LO_MASK             0xf8000000
+
 #define GEN6_GT_CORE_STATUS             0x138060
 #define   GEN6_CORE_CPD_STATE_MASK      (7<<4)
 #define   GEN6_RCn_MASK                 7