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path: root/drivers/gpu/drm/i915/i915_irq.c
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Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c44
1 files changed, 21 insertions, 23 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 63996aa3fb17..c482e8ae58dc 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2472,6 +2472,25 @@ void i915_hangcheck_elapsed(unsigned long data)
2472 DRM_I915_HANGCHECK_JIFFIES)); 2472 DRM_I915_HANGCHECK_JIFFIES));
2473} 2473}
2474 2474
2475static void ibx_irq_preinstall(struct drm_device *dev)
2476{
2477 struct drm_i915_private *dev_priv = dev->dev_private;
2478
2479 if (HAS_PCH_NOP(dev))
2480 return;
2481
2482 /* south display irq */
2483 I915_WRITE(SDEIMR, 0xffffffff);
2484 /*
2485 * SDEIER is also touched by the interrupt handler to work around missed
2486 * PCH interrupts. Hence we can't update it after the interrupt handler
2487 * is enabled - instead we unconditionally enable all PCH interrupt
2488 * sources here, but then only unmask them as needed with SDEIMR.
2489 */
2490 I915_WRITE(SDEIER, 0xffffffff);
2491 POSTING_READ(SDEIER);
2492}
2493
2475/* drm_dma.h hooks 2494/* drm_dma.h hooks
2476*/ 2495*/
2477static void ironlake_irq_preinstall(struct drm_device *dev) 2496static void ironlake_irq_preinstall(struct drm_device *dev)
@@ -2493,16 +2512,7 @@ static void ironlake_irq_preinstall(struct drm_device *dev)
2493 I915_WRITE(GTIER, 0x0); 2512 I915_WRITE(GTIER, 0x0);
2494 POSTING_READ(GTIER); 2513 POSTING_READ(GTIER);
2495 2514
2496 /* south display irq */ 2515 ibx_irq_preinstall(dev);
2497 I915_WRITE(SDEIMR, 0xffffffff);
2498 /*
2499 * SDEIER is also touched by the interrupt handler to work around missed
2500 * PCH interrupts. Hence we can't update it after the interrupt handler
2501 * is enabled - instead we unconditionally enable all PCH interrupt
2502 * sources here, but then only unmask them as needed with SDEIMR.
2503 */
2504 I915_WRITE(SDEIER, 0xffffffff);
2505 POSTING_READ(SDEIER);
2506} 2516}
2507 2517
2508static void ivybridge_irq_preinstall(struct drm_device *dev) 2518static void ivybridge_irq_preinstall(struct drm_device *dev)
@@ -2529,19 +2539,7 @@ static void ivybridge_irq_preinstall(struct drm_device *dev)
2529 I915_WRITE(GEN6_PMIER, 0x0); 2539 I915_WRITE(GEN6_PMIER, 0x0);
2530 POSTING_READ(GEN6_PMIER); 2540 POSTING_READ(GEN6_PMIER);
2531 2541
2532 if (HAS_PCH_NOP(dev)) 2542 ibx_irq_preinstall(dev);
2533 return;
2534
2535 /* south display irq */
2536 I915_WRITE(SDEIMR, 0xffffffff);
2537 /*
2538 * SDEIER is also touched by the interrupt handler to work around missed
2539 * PCH interrupts. Hence we can't update it after the interrupt handler
2540 * is enabled - instead we unconditionally enable all PCH interrupt
2541 * sources here, but then only unmask them as needed with SDEIMR.
2542 */
2543 I915_WRITE(SDEIER, 0xffffffff);
2544 POSTING_READ(SDEIER);
2545} 2543}
2546 2544
2547static void valleyview_irq_preinstall(struct drm_device *dev) 2545static void valleyview_irq_preinstall(struct drm_device *dev)