aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/i915_gpu_error.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gpu_error.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gpu_error.c78
1 files changed, 39 insertions, 39 deletions
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 41d0739e6fdf..2f04e4f2ff35 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -30,11 +30,6 @@
30#include <generated/utsrelease.h> 30#include <generated/utsrelease.h>
31#include "i915_drv.h" 31#include "i915_drv.h"
32 32
33static const char *yesno(int v)
34{
35 return v ? "yes" : "no";
36}
37
38static const char *ring_str(int ring) 33static const char *ring_str(int ring)
39{ 34{
40 switch (ring) { 35 switch (ring) {
@@ -197,8 +192,9 @@ static void print_error_buffers(struct drm_i915_error_state_buf *m,
197 err_printf(m, " %s [%d]:\n", name, count); 192 err_printf(m, " %s [%d]:\n", name, count);
198 193
199 while (count--) { 194 while (count--) {
200 err_printf(m, " %08x %8u %02x %02x [ ", 195 err_printf(m, " %08x_%08x %8u %02x %02x [ ",
201 err->gtt_offset, 196 upper_32_bits(err->gtt_offset),
197 lower_32_bits(err->gtt_offset),
202 err->size, 198 err->size,
203 err->read_domains, 199 err->read_domains,
204 err->write_domain); 200 err->write_domain);
@@ -427,15 +423,17 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
427 err_printf(m, " (submitted by %s [%d])", 423 err_printf(m, " (submitted by %s [%d])",
428 error->ring[i].comm, 424 error->ring[i].comm,
429 error->ring[i].pid); 425 error->ring[i].pid);
430 err_printf(m, " --- gtt_offset = 0x%08x\n", 426 err_printf(m, " --- gtt_offset = 0x%08x %08x\n",
431 obj->gtt_offset); 427 upper_32_bits(obj->gtt_offset),
428 lower_32_bits(obj->gtt_offset));
432 print_error_obj(m, obj); 429 print_error_obj(m, obj);
433 } 430 }
434 431
435 obj = error->ring[i].wa_batchbuffer; 432 obj = error->ring[i].wa_batchbuffer;
436 if (obj) { 433 if (obj) {
437 err_printf(m, "%s (w/a) --- gtt_offset = 0x%08x\n", 434 err_printf(m, "%s (w/a) --- gtt_offset = 0x%08x\n",
438 dev_priv->ring[i].name, obj->gtt_offset); 435 dev_priv->ring[i].name,
436 lower_32_bits(obj->gtt_offset));
439 print_error_obj(m, obj); 437 print_error_obj(m, obj);
440 } 438 }
441 439
@@ -454,22 +452,28 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
454 if ((obj = error->ring[i].ringbuffer)) { 452 if ((obj = error->ring[i].ringbuffer)) {
455 err_printf(m, "%s --- ringbuffer = 0x%08x\n", 453 err_printf(m, "%s --- ringbuffer = 0x%08x\n",
456 dev_priv->ring[i].name, 454 dev_priv->ring[i].name,
457 obj->gtt_offset); 455 lower_32_bits(obj->gtt_offset));
458 print_error_obj(m, obj); 456 print_error_obj(m, obj);
459 } 457 }
460 458
461 if ((obj = error->ring[i].hws_page)) { 459 if ((obj = error->ring[i].hws_page)) {
462 err_printf(m, "%s --- HW Status = 0x%08x\n", 460 u64 hws_offset = obj->gtt_offset;
463 dev_priv->ring[i].name, 461 u32 *hws_page = &obj->pages[0][0];
464 obj->gtt_offset); 462
463 if (i915.enable_execlists) {
464 hws_offset += LRC_PPHWSP_PN * PAGE_SIZE;
465 hws_page = &obj->pages[LRC_PPHWSP_PN][0];
466 }
467 err_printf(m, "%s --- HW Status = 0x%08llx\n",
468 dev_priv->ring[i].name, hws_offset);
465 offset = 0; 469 offset = 0;
466 for (elt = 0; elt < PAGE_SIZE/16; elt += 4) { 470 for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
467 err_printf(m, "[%04x] %08x %08x %08x %08x\n", 471 err_printf(m, "[%04x] %08x %08x %08x %08x\n",
468 offset, 472 offset,
469 obj->pages[0][elt], 473 hws_page[elt],
470 obj->pages[0][elt+1], 474 hws_page[elt+1],
471 obj->pages[0][elt+2], 475 hws_page[elt+2],
472 obj->pages[0][elt+3]); 476 hws_page[elt+3]);
473 offset += 16; 477 offset += 16;
474 } 478 }
475 } 479 }
@@ -477,13 +481,14 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
477 if ((obj = error->ring[i].ctx)) { 481 if ((obj = error->ring[i].ctx)) {
478 err_printf(m, "%s --- HW Context = 0x%08x\n", 482 err_printf(m, "%s --- HW Context = 0x%08x\n",
479 dev_priv->ring[i].name, 483 dev_priv->ring[i].name,
480 obj->gtt_offset); 484 lower_32_bits(obj->gtt_offset));
481 print_error_obj(m, obj); 485 print_error_obj(m, obj);
482 } 486 }
483 } 487 }
484 488
485 if ((obj = error->semaphore_obj)) { 489 if ((obj = error->semaphore_obj)) {
486 err_printf(m, "Semaphore page = 0x%08x\n", obj->gtt_offset); 490 err_printf(m, "Semaphore page = 0x%08x\n",
491 lower_32_bits(obj->gtt_offset));
487 for (elt = 0; elt < PAGE_SIZE/16; elt += 4) { 492 for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
488 err_printf(m, "[%04x] %08x %08x %08x %08x\n", 493 err_printf(m, "[%04x] %08x %08x %08x %08x\n",
489 elt * 4, 494 elt * 4,
@@ -591,7 +596,7 @@ i915_error_object_create(struct drm_i915_private *dev_priv,
591 int num_pages; 596 int num_pages;
592 bool use_ggtt; 597 bool use_ggtt;
593 int i = 0; 598 int i = 0;
594 u32 reloc_offset; 599 u64 reloc_offset;
595 600
596 if (src == NULL || src->pages == NULL) 601 if (src == NULL || src->pages == NULL)
597 return NULL; 602 return NULL;
@@ -787,20 +792,15 @@ static void i915_gem_record_fences(struct drm_device *dev,
787 int i; 792 int i;
788 793
789 if (IS_GEN3(dev) || IS_GEN2(dev)) { 794 if (IS_GEN3(dev) || IS_GEN2(dev)) {
790 for (i = 0; i < 8; i++)
791 error->fence[i] = I915_READ(FENCE_REG_830_0 + (i * 4));
792 if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
793 for (i = 0; i < 8; i++)
794 error->fence[i+8] = I915_READ(FENCE_REG_945_8 +
795 (i * 4));
796 } else if (IS_GEN5(dev) || IS_GEN4(dev))
797 for (i = 0; i < 16; i++)
798 error->fence[i] = I915_READ64(FENCE_REG_965_0 +
799 (i * 8));
800 else if (INTEL_INFO(dev)->gen >= 6)
801 for (i = 0; i < dev_priv->num_fence_regs; i++) 795 for (i = 0; i < dev_priv->num_fence_regs; i++)
802 error->fence[i] = I915_READ64(FENCE_REG_SANDYBRIDGE_0 + 796 error->fence[i] = I915_READ(FENCE_REG(i));
803 (i * 8)); 797 } else if (IS_GEN5(dev) || IS_GEN4(dev)) {
798 for (i = 0; i < dev_priv->num_fence_regs; i++)
799 error->fence[i] = I915_READ64(FENCE_REG_965_LO(i));
800 } else if (INTEL_INFO(dev)->gen >= 6) {
801 for (i = 0; i < dev_priv->num_fence_regs; i++)
802 error->fence[i] = I915_READ64(FENCE_REG_GEN6_LO(i));
803 }
804} 804}
805 805
806 806
@@ -886,7 +886,7 @@ static void i915_record_ring_state(struct drm_device *dev,
886 ering->faddr = I915_READ(DMA_FADD_I8XX); 886 ering->faddr = I915_READ(DMA_FADD_I8XX);
887 ering->ipeir = I915_READ(IPEIR); 887 ering->ipeir = I915_READ(IPEIR);
888 ering->ipehr = I915_READ(IPEHR); 888 ering->ipehr = I915_READ(IPEHR);
889 ering->instdone = I915_READ(INSTDONE); 889 ering->instdone = I915_READ(GEN2_INSTDONE);
890 } 890 }
891 891
892 ering->waiting = waitqueue_active(&ring->irq_queue); 892 ering->waiting = waitqueue_active(&ring->irq_queue);
@@ -1388,12 +1388,12 @@ void i915_get_extra_instdone(struct drm_device *dev, uint32_t *instdone)
1388 memset(instdone, 0, sizeof(*instdone) * I915_NUM_INSTDONE_REG); 1388 memset(instdone, 0, sizeof(*instdone) * I915_NUM_INSTDONE_REG);
1389 1389
1390 if (IS_GEN2(dev) || IS_GEN3(dev)) 1390 if (IS_GEN2(dev) || IS_GEN3(dev))
1391 instdone[0] = I915_READ(INSTDONE); 1391 instdone[0] = I915_READ(GEN2_INSTDONE);
1392 else if (IS_GEN4(dev) || IS_GEN5(dev) || IS_GEN6(dev)) { 1392 else if (IS_GEN4(dev) || IS_GEN5(dev) || IS_GEN6(dev)) {
1393 instdone[0] = I915_READ(INSTDONE_I965); 1393 instdone[0] = I915_READ(RING_INSTDONE(RENDER_RING_BASE));
1394 instdone[1] = I915_READ(INSTDONE1); 1394 instdone[1] = I915_READ(GEN4_INSTDONE1);
1395 } else if (INTEL_INFO(dev)->gen >= 7) { 1395 } else if (INTEL_INFO(dev)->gen >= 7) {
1396 instdone[0] = I915_READ(GEN7_INSTDONE_1); 1396 instdone[0] = I915_READ(RING_INSTDONE(RENDER_RING_BASE));
1397 instdone[1] = I915_READ(GEN7_SC_INSTDONE); 1397 instdone[1] = I915_READ(GEN7_SC_INSTDONE);
1398 instdone[2] = I915_READ(GEN7_SAMPLER_INSTDONE); 1398 instdone[2] = I915_READ(GEN7_SAMPLER_INSTDONE);
1399 instdone[3] = I915_READ(GEN7_ROW_INSTDONE); 1399 instdone[3] = I915_READ(GEN7_ROW_INSTDONE);