1 files changed, 150 insertions, 33 deletions

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index aa5f31d1c2ed..cc56206a1600 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -36,6 +36,8 @@
 
 #include <linux/io-mapping.h>
 
+#include "i915_gem_request.h"
+
 struct drm_i915_file_private;
 
 typedef uint32_t gen6_pte_t;
@@ -178,12 +180,32 @@ struct i915_vma {
         struct drm_i915_gem_object *obj;
         struct i915_address_space *vm;
         void __iomem *iomap;
+        u64 size;
+
+        unsigned int flags;
+        /**
+         * How many users have pinned this object in GTT space. The following
+         * users can each hold at most one reference: pwrite/pread, execbuffer
+         * (objects are not allowed multiple times for the same batchbuffer),
+         * and the framebuffer code. When switching/pageflipping, the
+         * framebuffer code has at most two buffers pinned per crtc.
+         *
+         * In the worst case this is 1 + 1 + 1 + 2*2 = 7. That would fit into 3
+         * bits with absolutely no headroom. So use 4 bits.
+         */
+#define I915_VMA_PIN_MASK 0xf
+#define I915_VMA_PIN_OVERFLOW   BIT(5)
 
         /** Flags and address space this VMA is bound to */
-#define GLOBAL_BIND     (1<<0)
-#define LOCAL_BIND      (1<<1)
-        unsigned int bound : 4;
-        bool is_ggtt : 1;
+#define I915_VMA_GLOBAL_BIND    BIT(6)
+#define I915_VMA_LOCAL_BIND     BIT(7)
+#define I915_VMA_BIND_MASK (I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND | I915_VMA_PIN_OVERFLOW)
+
+#define I915_VMA_GGTT   BIT(8)
+#define I915_VMA_CLOSED BIT(9)
+
+        unsigned int active;
+        struct i915_gem_active last_read[I915_NUM_ENGINES];
 
         /**
          * Support different GGTT views into the same object.
@@ -208,20 +230,46 @@ struct i915_vma {
         struct hlist_node exec_node;
         unsigned long exec_handle;
         struct drm_i915_gem_exec_object2 *exec_entry;
-
-        /**
-         * How many users have pinned this object in GTT space. The following
-         * users can each hold at most one reference: pwrite/pread, execbuffer
-         * (objects are not allowed multiple times for the same batchbuffer),
-         * and the framebuffer code. When switching/pageflipping, the
-         * framebuffer code has at most two buffers pinned per crtc.
-         *
-         * In the worst case this is 1 + 1 + 1 + 2*2 = 7. That would fit into 3
-         * bits with absolutely no headroom. So use 4 bits. */
-        unsigned int pin_count:4;
-#define DRM_I915_GEM_OBJECT_MAX_PIN_COUNT 0xf
 };
 
+static inline bool i915_vma_is_ggtt(const struct i915_vma *vma)
+{
+        return vma->flags & I915_VMA_GGTT;
+}
+
+static inline bool i915_vma_is_closed(const struct i915_vma *vma)
+{
+        return vma->flags & I915_VMA_CLOSED;
+}
+
+static inline unsigned int i915_vma_get_active(const struct i915_vma *vma)
+{
+        return vma->active;
+}
+
+static inline bool i915_vma_is_active(const struct i915_vma *vma)
+{
+        return i915_vma_get_active(vma);
+}
+
+static inline void i915_vma_set_active(struct i915_vma *vma,
+                                       unsigned int engine)
+{
+        vma->active |= BIT(engine);
+}
+
+static inline void i915_vma_clear_active(struct i915_vma *vma,
+                                         unsigned int engine)
+{
+        vma->active &= ~BIT(engine);
+}
+
+static inline bool i915_vma_has_active_engine(const struct i915_vma *vma,
+                                              unsigned int engine)
+{
+        return vma->active & BIT(engine);
+}
+
 struct i915_page_dma {
         struct page *page;
         union {
@@ -272,11 +320,20 @@ struct i915_pml4 {
 struct i915_address_space {
         struct drm_mm mm;
         struct drm_device *dev;
+        /* Every address space belongs to a struct file - except for the global
+         * GTT that is owned by the driver (and so @file is set to NULL). In
+         * principle, no information should leak from one context to another
+         * (or between files/processes etc) unless explicitly shared by the
+         * owner. Tracking the owner is important in order to free up per-file
+         * objects along with the file, to aide resource tracking, and to
+         * assign blame.
+         */
+        struct drm_i915_file_private *file;
         struct list_head global_link;
         u64 start;              /* Start offset always 0 for dri2 */
         u64 total;              /* size addr space maps (ex. 2GB for ggtt) */
 
-        bool is_ggtt;
+        bool closed;
 
         struct i915_page_scratch *scratch_page;
         struct i915_page_table *scratch_pt;
@@ -306,6 +363,13 @@ struct i915_address_space {
          */
         struct list_head inactive_list;
 
+        /**
+         * List of vma that have been unbound.
+         *
+         * A reference is not held on the buffer while on this list.
+         */
+        struct list_head unbound_list;
+
         /* FIXME: Need a more generic return type */
         gen6_pte_t (*pte_encode)(dma_addr_t addr,
                                  enum i915_cache_level level,
@@ -338,7 +402,7 @@ struct i915_address_space {
                         u32 flags);
 };
 
-#define i915_is_ggtt(V) ((V)->is_ggtt)
+#define i915_is_ggtt(V) (!(V)->file)
 
 /* The Graphics Translation Table is the way in which GEN hardware translates a
  * Graphics Virtual Address into a Physical Address. In addition to the normal
@@ -354,7 +418,6 @@ struct i915_ggtt {
         size_t stolen_usable_size;      /* Total size minus BIOS reserved */
         size_t stolen_reserved_base;
         size_t stolen_reserved_size;
-        size_t size;                    /* Total size of Global GTT */
         u64 mappable_end;               /* End offset that we can CPU map */
         struct io_mapping *mappable;    /* Mapping to our CPU mappable region */
         phys_addr_t mappable_base;      /* PA of our GMADR */
@@ -365,8 +428,6 @@ struct i915_ggtt {
         bool do_idle_maps;
 
         int mtrr;
-
-        int (*probe)(struct i915_ggtt *ggtt);
 };
 
 struct i915_hw_ppgtt {
@@ -380,8 +441,6 @@ struct i915_hw_ppgtt {
                 struct i915_page_directory pd;          /* GEN6-7 */
         };
 
-        struct drm_i915_file_private *file_priv;
-
         gen6_pte_t __iomem *pd_addr;
 
         int (*enable)(struct i915_hw_ppgtt *ppgtt);
@@ -521,14 +580,15 @@ i915_page_dir_dma_addr(const struct i915_hw_ppgtt *ppgtt, const unsigned n)
                 px_dma(ppgtt->base.scratch_pd);
 }
 
-int i915_ggtt_init_hw(struct drm_device *dev);
-int i915_ggtt_enable_hw(struct drm_device *dev);
-void i915_gem_init_ggtt(struct drm_device *dev);
-void i915_ggtt_cleanup_hw(struct drm_device *dev);
+int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv);
+int i915_ggtt_init_hw(struct drm_i915_private *dev_priv);
+int i915_ggtt_enable_hw(struct drm_i915_private *dev_priv);
+int i915_gem_init_ggtt(struct drm_i915_private *dev_priv);
+void i915_ggtt_cleanup_hw(struct drm_i915_private *dev_priv);
 
 int i915_ppgtt_init_hw(struct drm_device *dev);
 void i915_ppgtt_release(struct kref *kref);
-struct i915_hw_ppgtt *i915_ppgtt_create(struct drm_device *dev,
+struct i915_hw_ppgtt *i915_ppgtt_create(struct drm_i915_private *dev_priv,
                                         struct drm_i915_file_private *fpriv);
 static inline void i915_ppgtt_get(struct i915_hw_ppgtt *ppgtt)
 {
@@ -562,9 +622,66 @@ i915_ggtt_view_equal(const struct i915_ggtt_view *a,
         return true;
 }
 
-size_t
-i915_ggtt_view_size(struct drm_i915_gem_object *obj,
-                    const struct i915_ggtt_view *view);
+/* Flags used by pin/bind&friends. */
+#define PIN_NONBLOCK            BIT(0)
+#define PIN_MAPPABLE            BIT(1)
+#define PIN_ZONE_4G             BIT(2)
+
+#define PIN_MBZ                 BIT(5) /* I915_VMA_PIN_OVERFLOW */
+#define PIN_GLOBAL              BIT(6) /* I915_VMA_GLOBAL_BIND */
+#define PIN_USER                BIT(7) /* I915_VMA_LOCAL_BIND */
+#define PIN_UPDATE              BIT(8)
+
+#define PIN_HIGH                BIT(9)
+#define PIN_OFFSET_BIAS         BIT(10)
+#define PIN_OFFSET_FIXED        BIT(11)
+#define PIN_OFFSET_MASK         (~4095)
+
+int __i915_vma_do_pin(struct i915_vma *vma,
+                      u64 size, u64 alignment, u64 flags);
+static inline int __must_check
+i915_vma_pin(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
+{
+        BUILD_BUG_ON(PIN_MBZ != I915_VMA_PIN_OVERFLOW);
+        BUILD_BUG_ON(PIN_GLOBAL != I915_VMA_GLOBAL_BIND);
+        BUILD_BUG_ON(PIN_USER != I915_VMA_LOCAL_BIND);
+
+        /* Pin early to prevent the shrinker/eviction logic from destroying
+         * our vma as we insert and bind.
+         */
+        if (likely(((++vma->flags ^ flags) & I915_VMA_BIND_MASK) == 0))
+                return 0;
+
+        return __i915_vma_do_pin(vma, size, alignment, flags);
+}
+
+static inline int i915_vma_pin_count(const struct i915_vma *vma)
+{
+        return vma->flags & I915_VMA_PIN_MASK;
+}
+
+static inline bool i915_vma_is_pinned(const struct i915_vma *vma)
+{
+        return i915_vma_pin_count(vma);
+}
+
+static inline void __i915_vma_pin(struct i915_vma *vma)
+{
+        vma->flags++;
+        GEM_BUG_ON(vma->flags & I915_VMA_PIN_OVERFLOW);
+}
+
+static inline void __i915_vma_unpin(struct i915_vma *vma)
+{
+        GEM_BUG_ON(!i915_vma_is_pinned(vma));
+        vma->flags--;
+}
+
+static inline void i915_vma_unpin(struct i915_vma *vma)
+{
+        GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
+        __i915_vma_unpin(vma);
+}
 
 /**
  * i915_vma_pin_iomap - calls ioremap_wc to map the GGTT VMA via the aperture
@@ -580,6 +697,7 @@ i915_ggtt_view_size(struct drm_i915_gem_object *obj,
  * Returns a valid iomapped pointer or ERR_PTR.
  */
 void __iomem *i915_vma_pin_iomap(struct i915_vma *vma);
+#define IO_ERR_PTR(x) ((void __iomem *)ERR_PTR(x))
 
 /**
  * i915_vma_unpin_iomap - unpins the mapping returned from i915_vma_iomap
@@ -593,9 +711,8 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma *vma);
 static inline void i915_vma_unpin_iomap(struct i915_vma *vma)
 {
         lockdep_assert_held(&vma->vm->dev->struct_mutex);
-        GEM_BUG_ON(vma->pin_count == 0);
         GEM_BUG_ON(vma->iomap == NULL);
-        vma->pin_count--;
+        i915_vma_unpin(vma);
 }
 
 #endif