1 files changed, 11 insertions, 2 deletions

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 24fb989593f0..212f6d8c35ec 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -55,6 +55,7 @@
 #define HSW_WB_LLC_AGE3                 HSW_CACHEABILITY_CONTROL(0x2)
 #define HSW_WB_LLC_AGE0                 HSW_CACHEABILITY_CONTROL(0x3)
 #define HSW_WB_ELLC_LLC_AGE0            HSW_CACHEABILITY_CONTROL(0xb)
+#define HSW_WT_ELLC_LLC_AGE0            HSW_CACHEABILITY_CONTROL(0x6)
 
 static gen6_gtt_pte_t snb_pte_encode(dma_addr_t addr,
                                      enum i915_cache_level level)
@@ -138,8 +139,16 @@ static gen6_gtt_pte_t iris_pte_encode(dma_addr_t addr,
         gen6_gtt_pte_t pte = GEN6_PTE_VALID;
         pte |= HSW_PTE_ADDR_ENCODE(addr);
 
-        if (level != I915_CACHE_NONE)
+        switch (level) {
+        case I915_CACHE_NONE:
+                break;
+        case I915_CACHE_WT:
+                pte |= HSW_WT_ELLC_LLC_AGE0;
+                break;
+        default:
                 pte |= HSW_WB_ELLC_LLC_AGE0;
+                break;
+        }
 
         return pte;
 }
@@ -487,7 +496,7 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
                                        dev_priv->gtt.base.total / PAGE_SIZE);
 
         list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
-                i915_gem_clflush_object(obj);
+                i915_gem_clflush_object(obj, obj->pin_display);
                 i915_gem_gtt_bind_object(obj, obj->cache_level);
         }