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path: root/drivers/gpu/drm/i915/i915_dma.c
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Diffstat (limited to 'drivers/gpu/drm/i915/i915_dma.c')
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c28
1 files changed, 27 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 54f86242e80e..3e4e6073d171 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -976,6 +976,9 @@ static int i915_getparam(struct drm_device *dev, void *data,
976 case I915_PARAM_HAS_LLC: 976 case I915_PARAM_HAS_LLC:
977 value = HAS_LLC(dev); 977 value = HAS_LLC(dev);
978 break; 978 break;
979 case I915_PARAM_HAS_WT:
980 value = HAS_WT(dev);
981 break;
979 case I915_PARAM_HAS_ALIASING_PPGTT: 982 case I915_PARAM_HAS_ALIASING_PPGTT:
980 value = dev_priv->mm.aliasing_ppgtt ? 1 : 0; 983 value = dev_priv->mm.aliasing_ppgtt ? 1 : 0;
981 break; 984 break;
@@ -1483,8 +1486,24 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
1483 mutex_init(&dev_priv->rps.hw_lock); 1486 mutex_init(&dev_priv->rps.hw_lock);
1484 mutex_init(&dev_priv->modeset_restore_lock); 1487 mutex_init(&dev_priv->modeset_restore_lock);
1485 1488
1489 mutex_init(&dev_priv->pc8.lock);
1490 dev_priv->pc8.requirements_met = false;
1491 dev_priv->pc8.gpu_idle = false;
1492 dev_priv->pc8.irqs_disabled = false;
1493 dev_priv->pc8.enabled = false;
1494 dev_priv->pc8.disable_count = 2; /* requirements_met + gpu_idle */
1495 INIT_DELAYED_WORK(&dev_priv->pc8.enable_work, hsw_enable_pc8_work);
1496
1486 i915_dump_device_info(dev_priv); 1497 i915_dump_device_info(dev_priv);
1487 1498
1499 /* Not all pre-production machines fall into this category, only the
1500 * very first ones. Almost everything should work, except for maybe
1501 * suspend/resume. And we don't implement workarounds that affect only
1502 * pre-production machines. */
1503 if (IS_HSW_EARLY_SDV(dev))
1504 DRM_INFO("This is an early pre-production Haswell machine. "
1505 "It may not be fully functional.\n");
1506
1488 if (i915_get_bridge_dev(dev)) { 1507 if (i915_get_bridge_dev(dev)) {
1489 ret = -EIO; 1508 ret = -EIO;
1490 goto free_priv; 1509 goto free_priv;
@@ -1677,8 +1696,13 @@ int i915_driver_unload(struct drm_device *dev)
1677 1696
1678 intel_gpu_ips_teardown(); 1697 intel_gpu_ips_teardown();
1679 1698
1680 if (HAS_POWER_WELL(dev)) 1699 if (HAS_POWER_WELL(dev)) {
1700 /* The i915.ko module is still not prepared to be loaded when
1701 * the power well is not enabled, so just enable it in case
1702 * we're going to unload/reload. */
1703 intel_set_power_well(dev, true);
1681 i915_remove_power_well(dev); 1704 i915_remove_power_well(dev);
1705 }
1682 1706
1683 i915_teardown_sysfs(dev); 1707 i915_teardown_sysfs(dev);
1684 1708
@@ -1724,6 +1748,8 @@ int i915_driver_unload(struct drm_device *dev)
1724 cancel_work_sync(&dev_priv->gpu_error.work); 1748 cancel_work_sync(&dev_priv->gpu_error.work);
1725 i915_destroy_error_state(dev); 1749 i915_destroy_error_state(dev);
1726 1750
1751 cancel_delayed_work_sync(&dev_priv->pc8.enable_work);
1752
1727 if (dev->pdev->msi_enabled) 1753 if (dev->pdev->msi_enabled)
1728 pci_disable_msi(dev->pdev); 1754 pci_disable_msi(dev->pdev);
1729 1755