diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_debugfs.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 109 |
1 files changed, 97 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 43866221cd4c..6ed45a984230 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
@@ -586,7 +586,53 @@ static int i915_interrupt_info(struct seq_file *m, void *data) | |||
586 | if (ret) | 586 | if (ret) |
587 | return ret; | 587 | return ret; |
588 | 588 | ||
589 | if (IS_VALLEYVIEW(dev)) { | 589 | if (INTEL_INFO(dev)->gen >= 8) { |
590 | int i; | ||
591 | seq_printf(m, "Master Interrupt Control:\t%08x\n", | ||
592 | I915_READ(GEN8_MASTER_IRQ)); | ||
593 | |||
594 | for (i = 0; i < 4; i++) { | ||
595 | seq_printf(m, "GT Interrupt IMR %d:\t%08x\n", | ||
596 | i, I915_READ(GEN8_GT_IMR(i))); | ||
597 | seq_printf(m, "GT Interrupt IIR %d:\t%08x\n", | ||
598 | i, I915_READ(GEN8_GT_IIR(i))); | ||
599 | seq_printf(m, "GT Interrupt IER %d:\t%08x\n", | ||
600 | i, I915_READ(GEN8_GT_IER(i))); | ||
601 | } | ||
602 | |||
603 | for_each_pipe(i) { | ||
604 | seq_printf(m, "Pipe %c IMR:\t%08x\n", | ||
605 | pipe_name(i), | ||
606 | I915_READ(GEN8_DE_PIPE_IMR(i))); | ||
607 | seq_printf(m, "Pipe %c IIR:\t%08x\n", | ||
608 | pipe_name(i), | ||
609 | I915_READ(GEN8_DE_PIPE_IIR(i))); | ||
610 | seq_printf(m, "Pipe %c IER:\t%08x\n", | ||
611 | pipe_name(i), | ||
612 | I915_READ(GEN8_DE_PIPE_IER(i))); | ||
613 | } | ||
614 | |||
615 | seq_printf(m, "Display Engine port interrupt mask:\t%08x\n", | ||
616 | I915_READ(GEN8_DE_PORT_IMR)); | ||
617 | seq_printf(m, "Display Engine port interrupt identity:\t%08x\n", | ||
618 | I915_READ(GEN8_DE_PORT_IIR)); | ||
619 | seq_printf(m, "Display Engine port interrupt enable:\t%08x\n", | ||
620 | I915_READ(GEN8_DE_PORT_IER)); | ||
621 | |||
622 | seq_printf(m, "Display Engine misc interrupt mask:\t%08x\n", | ||
623 | I915_READ(GEN8_DE_MISC_IMR)); | ||
624 | seq_printf(m, "Display Engine misc interrupt identity:\t%08x\n", | ||
625 | I915_READ(GEN8_DE_MISC_IIR)); | ||
626 | seq_printf(m, "Display Engine misc interrupt enable:\t%08x\n", | ||
627 | I915_READ(GEN8_DE_MISC_IER)); | ||
628 | |||
629 | seq_printf(m, "PCU interrupt mask:\t%08x\n", | ||
630 | I915_READ(GEN8_PCU_IMR)); | ||
631 | seq_printf(m, "PCU interrupt identity:\t%08x\n", | ||
632 | I915_READ(GEN8_PCU_IIR)); | ||
633 | seq_printf(m, "PCU interrupt enable:\t%08x\n", | ||
634 | I915_READ(GEN8_PCU_IER)); | ||
635 | } else if (IS_VALLEYVIEW(dev)) { | ||
590 | seq_printf(m, "Display IER:\t%08x\n", | 636 | seq_printf(m, "Display IER:\t%08x\n", |
591 | I915_READ(VLV_IER)); | 637 | I915_READ(VLV_IER)); |
592 | seq_printf(m, "Display IIR:\t%08x\n", | 638 | seq_printf(m, "Display IIR:\t%08x\n", |
@@ -658,7 +704,7 @@ static int i915_interrupt_info(struct seq_file *m, void *data) | |||
658 | seq_printf(m, "Interrupts received: %d\n", | 704 | seq_printf(m, "Interrupts received: %d\n", |
659 | atomic_read(&dev_priv->irq_received)); | 705 | atomic_read(&dev_priv->irq_received)); |
660 | for_each_ring(ring, dev_priv, i) { | 706 | for_each_ring(ring, dev_priv, i) { |
661 | if (IS_GEN6(dev) || IS_GEN7(dev)) { | 707 | if (INTEL_INFO(dev)->gen >= 6) { |
662 | seq_printf(m, | 708 | seq_printf(m, |
663 | "Graphics Interrupt mask (%s): %08x\n", | 709 | "Graphics Interrupt mask (%s): %08x\n", |
664 | ring->name, I915_READ_IMR(ring)); | 710 | ring->name, I915_READ_IMR(ring)); |
@@ -1577,7 +1623,7 @@ static int i915_swizzle_info(struct seq_file *m, void *data) | |||
1577 | I915_READ16(C0DRB3)); | 1623 | I915_READ16(C0DRB3)); |
1578 | seq_printf(m, "C1DRB3 = 0x%04x\n", | 1624 | seq_printf(m, "C1DRB3 = 0x%04x\n", |
1579 | I915_READ16(C1DRB3)); | 1625 | I915_READ16(C1DRB3)); |
1580 | } else if (IS_GEN6(dev) || IS_GEN7(dev)) { | 1626 | } else if (INTEL_INFO(dev)->gen >= 6) { |
1581 | seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n", | 1627 | seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n", |
1582 | I915_READ(MAD_DIMM_C0)); | 1628 | I915_READ(MAD_DIMM_C0)); |
1583 | seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n", | 1629 | seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n", |
@@ -1586,8 +1632,12 @@ static int i915_swizzle_info(struct seq_file *m, void *data) | |||
1586 | I915_READ(MAD_DIMM_C2)); | 1632 | I915_READ(MAD_DIMM_C2)); |
1587 | seq_printf(m, "TILECTL = 0x%08x\n", | 1633 | seq_printf(m, "TILECTL = 0x%08x\n", |
1588 | I915_READ(TILECTL)); | 1634 | I915_READ(TILECTL)); |
1589 | seq_printf(m, "ARB_MODE = 0x%08x\n", | 1635 | if (IS_GEN8(dev)) |
1590 | I915_READ(ARB_MODE)); | 1636 | seq_printf(m, "GAMTARBMODE = 0x%08x\n", |
1637 | I915_READ(GAMTARBMODE)); | ||
1638 | else | ||
1639 | seq_printf(m, "ARB_MODE = 0x%08x\n", | ||
1640 | I915_READ(ARB_MODE)); | ||
1591 | seq_printf(m, "DISP_ARB_CTL = 0x%08x\n", | 1641 | seq_printf(m, "DISP_ARB_CTL = 0x%08x\n", |
1592 | I915_READ(DISP_ARB_CTL)); | 1642 | I915_READ(DISP_ARB_CTL)); |
1593 | } | 1643 | } |
@@ -1596,18 +1646,37 @@ static int i915_swizzle_info(struct seq_file *m, void *data) | |||
1596 | return 0; | 1646 | return 0; |
1597 | } | 1647 | } |
1598 | 1648 | ||
1599 | static int i915_ppgtt_info(struct seq_file *m, void *data) | 1649 | static void gen8_ppgtt_info(struct seq_file *m, struct drm_device *dev) |
1600 | { | 1650 | { |
1601 | struct drm_info_node *node = (struct drm_info_node *) m->private; | ||
1602 | struct drm_device *dev = node->minor->dev; | ||
1603 | struct drm_i915_private *dev_priv = dev->dev_private; | 1651 | struct drm_i915_private *dev_priv = dev->dev_private; |
1604 | struct intel_ring_buffer *ring; | 1652 | struct intel_ring_buffer *ring; |
1605 | int i, ret; | 1653 | struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt; |
1654 | int unused, i; | ||
1606 | 1655 | ||
1656 | if (!ppgtt) | ||
1657 | return; | ||
1658 | |||
1659 | seq_printf(m, "Page directories: %d\n", ppgtt->num_pd_pages); | ||
1660 | seq_printf(m, "Page tables: %d\n", ppgtt->num_pt_pages); | ||
1661 | for_each_ring(ring, dev_priv, unused) { | ||
1662 | seq_printf(m, "%s\n", ring->name); | ||
1663 | for (i = 0; i < 4; i++) { | ||
1664 | u32 offset = 0x270 + i * 8; | ||
1665 | u64 pdp = I915_READ(ring->mmio_base + offset + 4); | ||
1666 | pdp <<= 32; | ||
1667 | pdp |= I915_READ(ring->mmio_base + offset); | ||
1668 | for (i = 0; i < 4; i++) | ||
1669 | seq_printf(m, "\tPDP%d 0x%016llx\n", i, pdp); | ||
1670 | } | ||
1671 | } | ||
1672 | } | ||
1673 | |||
1674 | static void gen6_ppgtt_info(struct seq_file *m, struct drm_device *dev) | ||
1675 | { | ||
1676 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
1677 | struct intel_ring_buffer *ring; | ||
1678 | int i; | ||
1607 | 1679 | ||
1608 | ret = mutex_lock_interruptible(&dev->struct_mutex); | ||
1609 | if (ret) | ||
1610 | return ret; | ||
1611 | if (INTEL_INFO(dev)->gen == 6) | 1680 | if (INTEL_INFO(dev)->gen == 6) |
1612 | seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE)); | 1681 | seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE)); |
1613 | 1682 | ||
@@ -1626,6 +1695,22 @@ static int i915_ppgtt_info(struct seq_file *m, void *data) | |||
1626 | seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset); | 1695 | seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset); |
1627 | } | 1696 | } |
1628 | seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK)); | 1697 | seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK)); |
1698 | } | ||
1699 | |||
1700 | static int i915_ppgtt_info(struct seq_file *m, void *data) | ||
1701 | { | ||
1702 | struct drm_info_node *node = (struct drm_info_node *) m->private; | ||
1703 | struct drm_device *dev = node->minor->dev; | ||
1704 | |||
1705 | int ret = mutex_lock_interruptible(&dev->struct_mutex); | ||
1706 | if (ret) | ||
1707 | return ret; | ||
1708 | |||
1709 | if (INTEL_INFO(dev)->gen >= 8) | ||
1710 | gen8_ppgtt_info(m, dev); | ||
1711 | else if (INTEL_INFO(dev)->gen >= 6) | ||
1712 | gen6_ppgtt_info(m, dev); | ||
1713 | |||
1629 | mutex_unlock(&dev->struct_mutex); | 1714 | mutex_unlock(&dev->struct_mutex); |
1630 | 1715 | ||
1631 | return 0; | 1716 | return 0; |