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-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/umc_v6_1.c10
2 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
index f5d6def96414..dfa1a39e57af 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
@@ -24,6 +24,8 @@
24struct amdgpu_umc_funcs { 24struct amdgpu_umc_funcs {
25 void (*query_ras_error_count)(struct amdgpu_device *adev, 25 void (*query_ras_error_count)(struct amdgpu_device *adev,
26 void *ras_error_status); 26 void *ras_error_status);
27 void (*query_ras_error_address)(struct amdgpu_device *adev,
28 void *ras_error_status);
27}; 29};
28 30
29struct amdgpu_umc { 31struct amdgpu_umc {
diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c b/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
index 5b1ccb81b3a2..e05f3e68edb0 100644
--- a/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
@@ -29,6 +29,16 @@
29#include "umc/umc_6_1_1_offset.h" 29#include "umc/umc_6_1_1_offset.h"
30#include "umc/umc_6_1_1_sh_mask.h" 30#include "umc/umc_6_1_1_sh_mask.h"
31 31
32#define smnMCA_UMC0_MCUMC_ADDRT0 0x50f10
33
34static uint32_t
35 umc_v6_1_channel_idx_tbl[UMC_V6_1_UMC_INSTANCE_NUM][UMC_V6_1_CHANNEL_INSTANCE_NUM] = {
36 {2, 18, 11, 27}, {4, 20, 13, 29},
37 {1, 17, 8, 24}, {7, 23, 14, 30},
38 {10, 26, 3, 19}, {12, 28, 5, 21},
39 {9, 25, 0, 16}, {15, 31, 6, 22}
40};
41
32static void umc_v6_1_enable_umc_index_mode(struct amdgpu_device *adev, 42static void umc_v6_1_enable_umc_index_mode(struct amdgpu_device *adev,
33 uint32_t umc_instance) 43 uint32_t umc_instance)
34{ 44{