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-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c16
-rw-r--r--drivers/gpu/drm/amd/amdkfd/kfd_priv.h11
-rw-r--r--drivers/gpu/drm/amd/amdkfd/kfd_process.c14
-rw-r--r--drivers/gpu/drm/amd/include/kgd_kfd_interface.h15
4 files changed, 38 insertions, 18 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index e957e42c539a..30e2b371578e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -196,11 +196,19 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
196 gpu_resources.sdma_doorbell[1][i+1] = 196 gpu_resources.sdma_doorbell[1][i+1] =
197 adev->doorbell_index.sdma_engine[1] + 0x200 + (i >> 1); 197 adev->doorbell_index.sdma_engine[1] + 0x200 + (i >> 1);
198 } 198 }
199 /* Doorbells 0x0e0-0ff and 0x2e0-2ff are reserved for 199
200 * SDMA, IH and VCN. So don't use them for the CP. 200 /* Since SOC15, BIF starts to statically use the
201 * lower 12 bits of doorbell addresses for routing
202 * based on settings in registers like
203 * SDMA0_DOORBELL_RANGE etc..
204 * In order to route a doorbell to CP engine, the lower
205 * 12 bits of its address has to be outside the range
206 * set for SDMA, VCN, and IH blocks.
201 */ 207 */
202 gpu_resources.reserved_doorbell_mask = 0x1e0; 208 gpu_resources.non_cp_doorbells_start =
203 gpu_resources.reserved_doorbell_val = 0x0e0; 209 adev->doorbell_index.first_non_cp;
210 gpu_resources.non_cp_doorbells_end =
211 adev->doorbell_index.last_non_cp;
204 212
205 kgd2kfd_device_init(adev->kfd.dev, &gpu_resources); 213 kgd2kfd_device_init(adev->kfd.dev, &gpu_resources);
206 } 214 }
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
index e5ebcca7f031..0eeee3c6d6dc 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
@@ -104,6 +104,17 @@
104#define KFD_KERNEL_QUEUE_SIZE 2048 104#define KFD_KERNEL_QUEUE_SIZE 2048
105 105
106/* 106/*
107 * 512 = 0x200
108 * The doorbell index distance between SDMA RLC (2*i) and (2*i+1) in the
109 * same SDMA engine on SOC15, which has 8-byte doorbells for SDMA.
110 * 512 8-byte doorbell distance (i.e. one page away) ensures that SDMA RLC
111 * (2*i+1) doorbells (in terms of the lower 12 bit address) lie exactly in
112 * the OFFSET and SIZE set in registers like BIF_SDMA0_DOORBELL_RANGE.
113 */
114#define KFD_QUEUE_DOORBELL_MIRROR_OFFSET 512
115
116
117/*
107 * Kernel module parameter to specify maximum number of supported queues per 118 * Kernel module parameter to specify maximum number of supported queues per
108 * device 119 * device
109 */ 120 */
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
index 80b36e860a0a..4bdae78bab8e 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
@@ -607,13 +607,17 @@ static int init_doorbell_bitmap(struct qcm_process_device *qpd,
607 if (!qpd->doorbell_bitmap) 607 if (!qpd->doorbell_bitmap)
608 return -ENOMEM; 608 return -ENOMEM;
609 609
610 /* Mask out any reserved doorbells */ 610 /* Mask out doorbells reserved for SDMA, IH, and VCN on SOC15. */
611 for (i = 0; i < KFD_MAX_NUM_OF_QUEUES_PER_PROCESS; i++) 611 for (i = 0; i < KFD_MAX_NUM_OF_QUEUES_PER_PROCESS / 2; i++) {
612 if ((dev->shared_resources.reserved_doorbell_mask & i) == 612 if (i >= dev->shared_resources.non_cp_doorbells_start
613 dev->shared_resources.reserved_doorbell_val) { 613 && i <= dev->shared_resources.non_cp_doorbells_end) {
614 set_bit(i, qpd->doorbell_bitmap); 614 set_bit(i, qpd->doorbell_bitmap);
615 pr_debug("reserved doorbell 0x%03x\n", i); 615 set_bit(i + KFD_QUEUE_DOORBELL_MIRROR_OFFSET,
616 qpd->doorbell_bitmap);
617 pr_debug("reserved doorbell 0x%03x and 0x%03x\n", i,
618 i + KFD_QUEUE_DOORBELL_MIRROR_OFFSET);
616 } 619 }
620 }
617 621
618 return 0; 622 return 0;
619} 623}
diff --git a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h b/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
index 83d960110d23..0b6b34f4e5a1 100644
--- a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
@@ -140,17 +140,14 @@ struct kgd2kfd_shared_resources {
140 /* Doorbell assignments (SOC15 and later chips only). Only 140 /* Doorbell assignments (SOC15 and later chips only). Only
141 * specific doorbells are routed to each SDMA engine. Others 141 * specific doorbells are routed to each SDMA engine. Others
142 * are routed to IH and VCN. They are not usable by the CP. 142 * are routed to IH and VCN. They are not usable by the CP.
143 *
144 * Any doorbell number D that satisfies the following condition
145 * is reserved: (D & reserved_doorbell_mask) == reserved_doorbell_val
146 *
147 * KFD currently uses 1024 (= 0x3ff) doorbells per process. If
148 * doorbells 0x0e0-0x0ff and 0x2e0-0x2ff are reserved, that means
149 * mask would be set to 0x1e0 and val set to 0x0e0.
150 */ 143 */
151 unsigned int sdma_doorbell[2][8]; 144 unsigned int sdma_doorbell[2][8];
152 unsigned int reserved_doorbell_mask; 145
153 unsigned int reserved_doorbell_val; 146 /* From SOC15 onward, the doorbell index range not usable for CP
147 * queues.
148 */
149 uint32_t non_cp_doorbells_start;
150 uint32_t non_cp_doorbells_end;
154 151
155 /* Base address of doorbell aperture. */ 152 /* Base address of doorbell aperture. */
156 phys_addr_t doorbell_physical_address; 153 phys_addr_t doorbell_physical_address;