aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c')
-rw-r--r--drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c9
1 files changed, 2 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
index d4bb934e7334..415f691c3fa9 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
@@ -60,10 +60,7 @@
60 60
61#define ICELAND_SMC_SIZE 0x20000 61#define ICELAND_SMC_SIZE 0x20000
62 62
63#define VOLTAGE_SCALE 4
64#define POWERTUNE_DEFAULT_SET_MAX 1 63#define POWERTUNE_DEFAULT_SET_MAX 1
65#define VOLTAGE_VID_OFFSET_SCALE1 625
66#define VOLTAGE_VID_OFFSET_SCALE2 100
67#define MC_CG_ARB_FREQ_F1 0x0b 64#define MC_CG_ARB_FREQ_F1 0x0b
68#define VDDC_VDDCI_DELTA 200 65#define VDDC_VDDCI_DELTA 200
69 66
@@ -932,7 +929,7 @@ static int iceland_populate_single_graphic_level(struct pp_hwmgr *hwmgr,
932 graphic_level->PowerThrottle = 0; 929 graphic_level->PowerThrottle = 0;
933 930
934 data->display_timing.min_clock_in_sr = 931 data->display_timing.min_clock_in_sr =
935 hwmgr->display_config.min_core_set_clock_in_sr; 932 hwmgr->display_config->min_core_set_clock_in_sr;
936 933
937 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, 934 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
938 PHM_PlatformCaps_SclkDeepSleep)) 935 PHM_PlatformCaps_SclkDeepSleep))
@@ -1236,7 +1233,6 @@ static int iceland_populate_single_memory_level(
1236 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); 1233 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
1237 int result = 0; 1234 int result = 0;
1238 bool dll_state_on; 1235 bool dll_state_on;
1239 struct cgs_display_info info = {0};
1240 uint32_t mclk_edc_wr_enable_threshold = 40000; 1236 uint32_t mclk_edc_wr_enable_threshold = 40000;
1241 uint32_t mclk_edc_enable_threshold = 40000; 1237 uint32_t mclk_edc_enable_threshold = 40000;
1242 uint32_t mclk_strobe_mode_threshold = 40000; 1238 uint32_t mclk_strobe_mode_threshold = 40000;
@@ -1283,8 +1279,7 @@ static int iceland_populate_single_memory_level(
1283 /* default set to low watermark. Highest level will be set to high later.*/ 1279 /* default set to low watermark. Highest level will be set to high later.*/
1284 memory_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; 1280 memory_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
1285 1281
1286 cgs_get_active_displays_info(hwmgr->device, &info); 1282 data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
1287 data->display_timing.num_existing_displays = info.display_count;
1288 1283
1289 /* stutter mode not support on iceland */ 1284 /* stutter mode not support on iceland */
1290 1285