diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 25 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 26 |
2 files changed, 25 insertions, 26 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index d4411f60d1ce..7dee9af33196 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h | |||
@@ -180,7 +180,6 @@ extern int amdgpu_powerplay; | |||
180 | #define CIK_CURSOR_HEIGHT 128 | 180 | #define CIK_CURSOR_HEIGHT 128 |
181 | 181 | ||
182 | struct amdgpu_device; | 182 | struct amdgpu_device; |
183 | struct amdgpu_fence; | ||
184 | struct amdgpu_ib; | 183 | struct amdgpu_ib; |
185 | struct amdgpu_vm; | 184 | struct amdgpu_vm; |
186 | struct amdgpu_ring; | 185 | struct amdgpu_ring; |
@@ -403,16 +402,6 @@ struct amdgpu_fence_driver { | |||
403 | #define AMDGPU_FENCE_FLAG_64BIT (1 << 0) | 402 | #define AMDGPU_FENCE_FLAG_64BIT (1 << 0) |
404 | #define AMDGPU_FENCE_FLAG_INT (1 << 1) | 403 | #define AMDGPU_FENCE_FLAG_INT (1 << 1) |
405 | 404 | ||
406 | struct amdgpu_fence { | ||
407 | struct fence base; | ||
408 | |||
409 | /* RB, DMA, etc. */ | ||
410 | struct amdgpu_ring *ring; | ||
411 | uint64_t seq; | ||
412 | |||
413 | wait_queue_t fence_wake; | ||
414 | }; | ||
415 | |||
416 | struct amdgpu_user_fence { | 405 | struct amdgpu_user_fence { |
417 | /* write-back bo */ | 406 | /* write-back bo */ |
418 | struct amdgpu_bo *bo; | 407 | struct amdgpu_bo *bo; |
@@ -2109,20 +2098,6 @@ u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index); | |||
2109 | void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v); | 2098 | void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v); |
2110 | 2099 | ||
2111 | /* | 2100 | /* |
2112 | * Cast helper | ||
2113 | */ | ||
2114 | extern const struct fence_ops amdgpu_fence_ops; | ||
2115 | static inline struct amdgpu_fence *to_amdgpu_fence(struct fence *f) | ||
2116 | { | ||
2117 | struct amdgpu_fence *__f = container_of(f, struct amdgpu_fence, base); | ||
2118 | |||
2119 | if (__f->base.ops == &amdgpu_fence_ops) | ||
2120 | return __f; | ||
2121 | |||
2122 | return NULL; | ||
2123 | } | ||
2124 | |||
2125 | /* | ||
2126 | * Registers read & write functions. | 2101 | * Registers read & write functions. |
2127 | */ | 2102 | */ |
2128 | #define RREG32(reg) amdgpu_mm_rreg(adev, (reg), false) | 2103 | #define RREG32(reg) amdgpu_mm_rreg(adev, (reg), false) |
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c index fabb01e8c8d5..3db18f42c5c9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | |||
@@ -47,9 +47,33 @@ | |||
47 | * that the the relevant GPU caches have been flushed. | 47 | * that the the relevant GPU caches have been flushed. |
48 | */ | 48 | */ |
49 | 49 | ||
50 | struct amdgpu_fence { | ||
51 | struct fence base; | ||
52 | |||
53 | /* RB, DMA, etc. */ | ||
54 | struct amdgpu_ring *ring; | ||
55 | uint64_t seq; | ||
56 | |||
57 | wait_queue_t fence_wake; | ||
58 | }; | ||
59 | |||
50 | static struct kmem_cache *amdgpu_fence_slab; | 60 | static struct kmem_cache *amdgpu_fence_slab; |
51 | static atomic_t amdgpu_fence_slab_ref = ATOMIC_INIT(0); | 61 | static atomic_t amdgpu_fence_slab_ref = ATOMIC_INIT(0); |
52 | 62 | ||
63 | /* | ||
64 | * Cast helper | ||
65 | */ | ||
66 | static const struct fence_ops amdgpu_fence_ops; | ||
67 | static inline struct amdgpu_fence *to_amdgpu_fence(struct fence *f) | ||
68 | { | ||
69 | struct amdgpu_fence *__f = container_of(f, struct amdgpu_fence, base); | ||
70 | |||
71 | if (__f->base.ops == &amdgpu_fence_ops) | ||
72 | return __f; | ||
73 | |||
74 | return NULL; | ||
75 | } | ||
76 | |||
53 | /** | 77 | /** |
54 | * amdgpu_fence_write - write a fence value | 78 | * amdgpu_fence_write - write a fence value |
55 | * | 79 | * |
@@ -663,7 +687,7 @@ static void amdgpu_fence_release(struct fence *f) | |||
663 | kmem_cache_free(amdgpu_fence_slab, fence); | 687 | kmem_cache_free(amdgpu_fence_slab, fence); |
664 | } | 688 | } |
665 | 689 | ||
666 | const struct fence_ops amdgpu_fence_ops = { | 690 | static const struct fence_ops amdgpu_fence_ops = { |
667 | .get_driver_name = amdgpu_fence_get_driver_name, | 691 | .get_driver_name = amdgpu_fence_get_driver_name, |
668 | .get_timeline_name = amdgpu_fence_get_timeline_name, | 692 | .get_timeline_name = amdgpu_fence_get_timeline_name, |
669 | .enable_signaling = amdgpu_fence_enable_signaling, | 693 | .enable_signaling = amdgpu_fence_enable_signaling, |