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-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h22
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c10
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h25
-rw-r--r--drivers/gpu/drm/amd/amdgpu/ci_dpm.c4
-rw-r--r--drivers/gpu/drm/amd/amdgpu/cik_ih.c2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/cik_sdma.c6
-rw-r--r--drivers/gpu/drm/amd/amdgpu/cz_ih.c2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/dce_v10_0.c6
-rw-r--r--drivers/gpu/drm/amd/amdgpu/dce_v11_0.c6
-rw-r--r--drivers/gpu/drm/amd/amdgpu/dce_v6_0.c6
-rw-r--r--drivers/gpu/drm/amd/amdgpu/dce_v8_0.c6
-rw-r--r--drivers/gpu/drm/amd/amdgpu/dce_virtual.c2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c6
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c6
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c12
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c4
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c4
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c4
-rw-r--r--drivers/gpu/drm/amd/amdgpu/iceland_ih.c2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/kv_dpm.c4
-rw-r--r--drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c4
-rw-r--r--drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c6
-rw-r--r--drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c6
-rw-r--r--drivers/gpu/drm/amd/amdgpu/si_dma.c4
-rw-r--r--drivers/gpu/drm/amd/amdgpu/si_dpm.c4
-rw-r--r--drivers/gpu/drm/amd/amdgpu/si_ih.c2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/tonga_ih.c2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c4
-rw-r--r--drivers/gpu/drm/amd/amdgpu/vce_v2_0.c2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/vce_v3_0.c2
32 files changed, 89 insertions, 90 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
index fd2bbaa20ab4..9ce8c93ec19b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
@@ -24,12 +24,8 @@
24#ifndef __AMDGPU_IH_H__ 24#ifndef __AMDGPU_IH_H__
25#define __AMDGPU_IH_H__ 25#define __AMDGPU_IH_H__
26 26
27#include "soc15_ih_clientid.h"
28
29struct amdgpu_device; 27struct amdgpu_device;
30 28struct amdgpu_iv_entry;
31#define AMDGPU_IH_CLIENTID_LEGACY 0
32#define AMDGPU_IH_CLIENTID_MAX SOC15_IH_CLIENTID_MAX
33 29
34/* 30/*
35 * R6xx+ IH ring 31 * R6xx+ IH ring
@@ -51,22 +47,6 @@ struct amdgpu_ih_ring {
51 dma_addr_t rb_dma_addr; /* only used when use_bus_addr = true */ 47 dma_addr_t rb_dma_addr; /* only used when use_bus_addr = true */
52}; 48};
53 49
54#define AMDGPU_IH_SRC_DATA_MAX_SIZE_DW 4
55
56struct amdgpu_iv_entry {
57 unsigned client_id;
58 unsigned src_id;
59 unsigned ring_id;
60 unsigned vmid;
61 unsigned vmid_src;
62 uint64_t timestamp;
63 unsigned timestamp_src;
64 unsigned pasid;
65 unsigned pasid_src;
66 unsigned src_data[AMDGPU_IH_SRC_DATA_MAX_SIZE_DW];
67 const uint32_t *iv_entry;
68};
69
70/* provided by the ih block */ 50/* provided by the ih block */
71struct amdgpu_ih_funcs { 51struct amdgpu_ih_funcs {
72 /* ring read/write ptr handling, called from interrupt context */ 52 /* ring read/write ptr handling, called from interrupt context */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index 2fca08e130b6..52c17f6219a7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -124,7 +124,7 @@ void amdgpu_irq_disable_all(struct amdgpu_device *adev)
124 int r; 124 int r;
125 125
126 spin_lock_irqsave(&adev->irq.lock, irqflags); 126 spin_lock_irqsave(&adev->irq.lock, irqflags);
127 for (i = 0; i < AMDGPU_IH_CLIENTID_MAX; ++i) { 127 for (i = 0; i < AMDGPU_IRQ_CLIENTID_MAX; ++i) {
128 if (!adev->irq.client[i].sources) 128 if (!adev->irq.client[i].sources)
129 continue; 129 continue;
130 130
@@ -302,7 +302,7 @@ void amdgpu_irq_fini(struct amdgpu_device *adev)
302 cancel_work_sync(&adev->reset_work); 302 cancel_work_sync(&adev->reset_work);
303 } 303 }
304 304
305 for (i = 0; i < AMDGPU_IH_CLIENTID_MAX; ++i) { 305 for (i = 0; i < AMDGPU_IRQ_CLIENTID_MAX; ++i) {
306 if (!adev->irq.client[i].sources) 306 if (!adev->irq.client[i].sources)
307 continue; 307 continue;
308 308
@@ -342,7 +342,7 @@ int amdgpu_irq_add_id(struct amdgpu_device *adev,
342 unsigned client_id, unsigned src_id, 342 unsigned client_id, unsigned src_id,
343 struct amdgpu_irq_src *source) 343 struct amdgpu_irq_src *source)
344{ 344{
345 if (client_id >= AMDGPU_IH_CLIENTID_MAX) 345 if (client_id >= AMDGPU_IRQ_CLIENTID_MAX)
346 return -EINVAL; 346 return -EINVAL;
347 347
348 if (src_id >= AMDGPU_MAX_IRQ_SRC_ID) 348 if (src_id >= AMDGPU_MAX_IRQ_SRC_ID)
@@ -396,7 +396,7 @@ void amdgpu_irq_dispatch(struct amdgpu_device *adev,
396 396
397 trace_amdgpu_iv(entry); 397 trace_amdgpu_iv(entry);
398 398
399 if (client_id >= AMDGPU_IH_CLIENTID_MAX) { 399 if (client_id >= AMDGPU_IRQ_CLIENTID_MAX) {
400 DRM_DEBUG("Invalid client_id in IV: %d\n", client_id); 400 DRM_DEBUG("Invalid client_id in IV: %d\n", client_id);
401 return; 401 return;
402 } 402 }
@@ -469,7 +469,7 @@ void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev)
469{ 469{
470 int i, j, k; 470 int i, j, k;
471 471
472 for (i = 0; i < AMDGPU_IH_CLIENTID_MAX; ++i) { 472 for (i = 0; i < AMDGPU_IRQ_CLIENTID_MAX; ++i) {
473 if (!adev->irq.client[i].sources) 473 if (!adev->irq.client[i].sources)
474 continue; 474 continue;
475 475
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
index 3375ad778edc..f6ce171cb8aa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
@@ -25,19 +25,38 @@
25#define __AMDGPU_IRQ_H__ 25#define __AMDGPU_IRQ_H__
26 26
27#include <linux/irqdomain.h> 27#include <linux/irqdomain.h>
28#include "soc15_ih_clientid.h"
28#include "amdgpu_ih.h" 29#include "amdgpu_ih.h"
29 30
30#define AMDGPU_MAX_IRQ_SRC_ID 0x100 31#define AMDGPU_MAX_IRQ_SRC_ID 0x100
31#define AMDGPU_MAX_IRQ_CLIENT_ID 0x100 32#define AMDGPU_MAX_IRQ_CLIENT_ID 0x100
32 33
34#define AMDGPU_IRQ_CLIENTID_LEGACY 0
35#define AMDGPU_IRQ_CLIENTID_MAX SOC15_IH_CLIENTID_MAX
36
37#define AMDGPU_IRQ_SRC_DATA_MAX_SIZE_DW 4
38
33struct amdgpu_device; 39struct amdgpu_device;
34struct amdgpu_iv_entry;
35 40
36enum amdgpu_interrupt_state { 41enum amdgpu_interrupt_state {
37 AMDGPU_IRQ_STATE_DISABLE, 42 AMDGPU_IRQ_STATE_DISABLE,
38 AMDGPU_IRQ_STATE_ENABLE, 43 AMDGPU_IRQ_STATE_ENABLE,
39}; 44};
40 45
46struct amdgpu_iv_entry {
47 unsigned client_id;
48 unsigned src_id;
49 unsigned ring_id;
50 unsigned vmid;
51 unsigned vmid_src;
52 uint64_t timestamp;
53 unsigned timestamp_src;
54 unsigned pasid;
55 unsigned pasid_src;
56 unsigned src_data[AMDGPU_IRQ_SRC_DATA_MAX_SIZE_DW];
57 const uint32_t *iv_entry;
58};
59
41struct amdgpu_irq_src { 60struct amdgpu_irq_src {
42 unsigned num_types; 61 unsigned num_types;
43 atomic_t *enabled_types; 62 atomic_t *enabled_types;
@@ -63,7 +82,7 @@ struct amdgpu_irq {
63 bool installed; 82 bool installed;
64 spinlock_t lock; 83 spinlock_t lock;
65 /* interrupt sources */ 84 /* interrupt sources */
66 struct amdgpu_irq_client client[AMDGPU_IH_CLIENTID_MAX]; 85 struct amdgpu_irq_client client[AMDGPU_IRQ_CLIENTID_MAX];
67 86
68 /* status, etc. */ 87 /* status, etc. */
69 bool msi_enabled; /* msi enabled */ 88 bool msi_enabled; /* msi enabled */
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
index d2469453dca2..79220a91abe3 100644
--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
@@ -6277,12 +6277,12 @@ static int ci_dpm_sw_init(void *handle)
6277 int ret; 6277 int ret;
6278 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 6278 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
6279 6279
6280 ret = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 230, 6280 ret = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 230,
6281 &adev->pm.dpm.thermal.irq); 6281 &adev->pm.dpm.thermal.irq);
6282 if (ret) 6282 if (ret)
6283 return ret; 6283 return ret;
6284 6284
6285 ret = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 231, 6285 ret = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 231,
6286 &adev->pm.dpm.thermal.irq); 6286 &adev->pm.dpm.thermal.irq);
6287 if (ret) 6287 if (ret)
6288 return ret; 6288 return ret;
diff --git a/drivers/gpu/drm/amd/amdgpu/cik_ih.c b/drivers/gpu/drm/amd/amdgpu/cik_ih.c
index c37c4b76e7e9..b5775c6a857b 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik_ih.c
@@ -276,7 +276,7 @@ static void cik_ih_decode_iv(struct amdgpu_device *adev,
276 dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]); 276 dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]);
277 dw[3] = le32_to_cpu(adev->irq.ih.ring[ring_index + 3]); 277 dw[3] = le32_to_cpu(adev->irq.ih.ring[ring_index + 3]);
278 278
279 entry->client_id = AMDGPU_IH_CLIENTID_LEGACY; 279 entry->client_id = AMDGPU_IRQ_CLIENTID_LEGACY;
280 entry->src_id = dw[0] & 0xff; 280 entry->src_id = dw[0] & 0xff;
281 entry->src_data[0] = dw[1] & 0xfffffff; 281 entry->src_data[0] = dw[1] & 0xfffffff;
282 entry->ring_id = dw[2] & 0xff; 282 entry->ring_id = dw[2] & 0xff;
diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
index ee9d5c92edb1..b918c8886b75 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
@@ -970,19 +970,19 @@ static int cik_sdma_sw_init(void *handle)
970 } 970 }
971 971
972 /* SDMA trap event */ 972 /* SDMA trap event */
973 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 224, 973 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 224,
974 &adev->sdma.trap_irq); 974 &adev->sdma.trap_irq);
975 if (r) 975 if (r)
976 return r; 976 return r;
977 977
978 /* SDMA Privileged inst */ 978 /* SDMA Privileged inst */
979 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 241, 979 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 241,
980 &adev->sdma.illegal_inst_irq); 980 &adev->sdma.illegal_inst_irq);
981 if (r) 981 if (r)
982 return r; 982 return r;
983 983
984 /* SDMA Privileged inst */ 984 /* SDMA Privileged inst */
985 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 247, 985 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 247,
986 &adev->sdma.illegal_inst_irq); 986 &adev->sdma.illegal_inst_irq);
987 if (r) 987 if (r)
988 return r; 988 return r;
diff --git a/drivers/gpu/drm/amd/amdgpu/cz_ih.c b/drivers/gpu/drm/amd/amdgpu/cz_ih.c
index 306e0bd154fa..df5ac4d85a00 100644
--- a/drivers/gpu/drm/amd/amdgpu/cz_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/cz_ih.c
@@ -255,7 +255,7 @@ static void cz_ih_decode_iv(struct amdgpu_device *adev,
255 dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]); 255 dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]);
256 dw[3] = le32_to_cpu(adev->irq.ih.ring[ring_index + 3]); 256 dw[3] = le32_to_cpu(adev->irq.ih.ring[ring_index + 3]);
257 257
258 entry->client_id = AMDGPU_IH_CLIENTID_LEGACY; 258 entry->client_id = AMDGPU_IRQ_CLIENTID_LEGACY;
259 entry->src_id = dw[0] & 0xff; 259 entry->src_id = dw[0] & 0xff;
260 entry->src_data[0] = dw[1] & 0xfffffff; 260 entry->src_data[0] = dw[1] & 0xfffffff;
261 entry->ring_id = dw[2] & 0xff; 261 entry->ring_id = dw[2] & 0xff;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 89c09c396fe6..4cfecdce29a3 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2746,19 +2746,19 @@ static int dce_v10_0_sw_init(void *handle)
2746 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 2746 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
2747 2747
2748 for (i = 0; i < adev->mode_info.num_crtc; i++) { 2748 for (i = 0; i < adev->mode_info.num_crtc; i++) {
2749 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, i + 1, &adev->crtc_irq); 2749 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + 1, &adev->crtc_irq);
2750 if (r) 2750 if (r)
2751 return r; 2751 return r;
2752 } 2752 }
2753 2753
2754 for (i = VISLANDS30_IV_SRCID_D1_GRPH_PFLIP; i < 20; i += 2) { 2754 for (i = VISLANDS30_IV_SRCID_D1_GRPH_PFLIP; i < 20; i += 2) {
2755 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, i, &adev->pageflip_irq); 2755 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i, &adev->pageflip_irq);
2756 if (r) 2756 if (r)
2757 return r; 2757 return r;
2758 } 2758 }
2759 2759
2760 /* HPD hotplug */ 2760 /* HPD hotplug */
2761 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A, &adev->hpd_irq); 2761 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A, &adev->hpd_irq);
2762 if (r) 2762 if (r)
2763 return r; 2763 return r;
2764 2764
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index cf6faaa05dbb..7c868916d90f 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2867,19 +2867,19 @@ static int dce_v11_0_sw_init(void *handle)
2867 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 2867 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
2868 2868
2869 for (i = 0; i < adev->mode_info.num_crtc; i++) { 2869 for (i = 0; i < adev->mode_info.num_crtc; i++) {
2870 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, i + 1, &adev->crtc_irq); 2870 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + 1, &adev->crtc_irq);
2871 if (r) 2871 if (r)
2872 return r; 2872 return r;
2873 } 2873 }
2874 2874
2875 for (i = VISLANDS30_IV_SRCID_D1_GRPH_PFLIP; i < 20; i += 2) { 2875 for (i = VISLANDS30_IV_SRCID_D1_GRPH_PFLIP; i < 20; i += 2) {
2876 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, i, &adev->pageflip_irq); 2876 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i, &adev->pageflip_irq);
2877 if (r) 2877 if (r)
2878 return r; 2878 return r;
2879 } 2879 }
2880 2880
2881 /* HPD hotplug */ 2881 /* HPD hotplug */
2882 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A, &adev->hpd_irq); 2882 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A, &adev->hpd_irq);
2883 if (r) 2883 if (r)
2884 return r; 2884 return r;
2885 2885
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 371aa05bf537..17eaaba36017 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -2616,19 +2616,19 @@ static int dce_v6_0_sw_init(void *handle)
2616 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 2616 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
2617 2617
2618 for (i = 0; i < adev->mode_info.num_crtc; i++) { 2618 for (i = 0; i < adev->mode_info.num_crtc; i++) {
2619 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, i + 1, &adev->crtc_irq); 2619 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + 1, &adev->crtc_irq);
2620 if (r) 2620 if (r)
2621 return r; 2621 return r;
2622 } 2622 }
2623 2623
2624 for (i = 8; i < 20; i += 2) { 2624 for (i = 8; i < 20; i += 2) {
2625 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, i, &adev->pageflip_irq); 2625 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i, &adev->pageflip_irq);
2626 if (r) 2626 if (r)
2627 return r; 2627 return r;
2628 } 2628 }
2629 2629
2630 /* HPD hotplug */ 2630 /* HPD hotplug */
2631 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 42, &adev->hpd_irq); 2631 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 42, &adev->hpd_irq);
2632 if (r) 2632 if (r)
2633 return r; 2633 return r;
2634 2634
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 30e76f2407c2..8c0576978d36 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -2643,19 +2643,19 @@ static int dce_v8_0_sw_init(void *handle)
2643 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 2643 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
2644 2644
2645 for (i = 0; i < adev->mode_info.num_crtc; i++) { 2645 for (i = 0; i < adev->mode_info.num_crtc; i++) {
2646 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, i + 1, &adev->crtc_irq); 2646 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + 1, &adev->crtc_irq);
2647 if (r) 2647 if (r)
2648 return r; 2648 return r;
2649 } 2649 }
2650 2650
2651 for (i = 8; i < 20; i += 2) { 2651 for (i = 8; i < 20; i += 2) {
2652 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, i, &adev->pageflip_irq); 2652 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i, &adev->pageflip_irq);
2653 if (r) 2653 if (r)
2654 return r; 2654 return r;
2655 } 2655 }
2656 2656
2657 /* HPD hotplug */ 2657 /* HPD hotplug */
2658 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 42, &adev->hpd_irq); 2658 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 42, &adev->hpd_irq);
2659 if (r) 2659 if (r)
2660 return r; 2660 return r;
2661 2661
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
index 2cc480d65394..fdace004544d 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
@@ -372,7 +372,7 @@ static int dce_virtual_sw_init(void *handle)
372 int r, i; 372 int r, i;
373 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 373 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
374 374
375 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SMU_DISP_TIMER2_TRIGGER, &adev->crtc_irq); 375 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SMU_DISP_TIMER2_TRIGGER, &adev->crtc_irq);
376 if (r) 376 if (r)
377 return r; 377 return r;
378 378
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index 95d916ff099e..d76eb27945dc 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
@@ -3094,15 +3094,15 @@ static int gfx_v6_0_sw_init(void *handle)
3094 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 3094 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
3095 int i, r; 3095 int i, r;
3096 3096
3097 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 181, &adev->gfx.eop_irq); 3097 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 181, &adev->gfx.eop_irq);
3098 if (r) 3098 if (r)
3099 return r; 3099 return r;
3100 3100
3101 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 184, &adev->gfx.priv_reg_irq); 3101 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 184, &adev->gfx.priv_reg_irq);
3102 if (r) 3102 if (r)
3103 return r; 3103 return r;
3104 3104
3105 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 185, &adev->gfx.priv_inst_irq); 3105 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 185, &adev->gfx.priv_inst_irq);
3106 if (r) 3106 if (r)
3107 return r; 3107 return r;
3108 3108
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 1c9ede0ba77f..0e72bc09939a 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -4516,18 +4516,18 @@ static int gfx_v7_0_sw_init(void *handle)
4516 adev->gfx.mec.num_queue_per_pipe = 8; 4516 adev->gfx.mec.num_queue_per_pipe = 8;
4517 4517
4518 /* EOP Event */ 4518 /* EOP Event */
4519 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 181, &adev->gfx.eop_irq); 4519 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 181, &adev->gfx.eop_irq);
4520 if (r) 4520 if (r)
4521 return r; 4521 return r;
4522 4522
4523 /* Privileged reg */ 4523 /* Privileged reg */
4524 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 184, 4524 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 184,
4525 &adev->gfx.priv_reg_irq); 4525 &adev->gfx.priv_reg_irq);
4526 if (r) 4526 if (r)
4527 return r; 4527 return r;
4528 4528
4529 /* Privileged inst */ 4529 /* Privileged inst */
4530 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 185, 4530 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 185,
4531 &adev->gfx.priv_inst_irq); 4531 &adev->gfx.priv_inst_irq);
4532 if (r) 4532 if (r)
4533 return r; 4533 return r;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 463d07e186d4..2aeef2bb93a4 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -2049,35 +2049,35 @@ static int gfx_v8_0_sw_init(void *handle)
2049 adev->gfx.mec.num_queue_per_pipe = 8; 2049 adev->gfx.mec.num_queue_per_pipe = 8;
2050 2050
2051 /* KIQ event */ 2051 /* KIQ event */
2052 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_CP_INT_IB2, &adev->gfx.kiq.irq); 2052 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_CP_INT_IB2, &adev->gfx.kiq.irq);
2053 if (r) 2053 if (r)
2054 return r; 2054 return r;
2055 2055
2056 /* EOP Event */ 2056 /* EOP Event */
2057 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_CP_END_OF_PIPE, &adev->gfx.eop_irq); 2057 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_CP_END_OF_PIPE, &adev->gfx.eop_irq);
2058 if (r) 2058 if (r)
2059 return r; 2059 return r;
2060 2060
2061 /* Privileged reg */ 2061 /* Privileged reg */
2062 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_CP_PRIV_REG_FAULT, 2062 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_CP_PRIV_REG_FAULT,
2063 &adev->gfx.priv_reg_irq); 2063 &adev->gfx.priv_reg_irq);
2064 if (r) 2064 if (r)
2065 return r; 2065 return r;
2066 2066
2067 /* Privileged inst */ 2067 /* Privileged inst */
2068 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_CP_PRIV_INSTR_FAULT, 2068 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_CP_PRIV_INSTR_FAULT,
2069 &adev->gfx.priv_inst_irq); 2069 &adev->gfx.priv_inst_irq);
2070 if (r) 2070 if (r)
2071 return r; 2071 return r;
2072 2072
2073 /* Add CP EDC/ECC irq */ 2073 /* Add CP EDC/ECC irq */
2074 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_CP_ECC_ERROR, 2074 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_CP_ECC_ERROR,
2075 &adev->gfx.cp_ecc_error_irq); 2075 &adev->gfx.cp_ecc_error_irq);
2076 if (r) 2076 if (r)
2077 return r; 2077 return r;
2078 2078
2079 /* SQ interrupts. */ 2079 /* SQ interrupts. */
2080 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SQ_INTERRUPT_MSG, 2080 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SQ_INTERRUPT_MSG,
2081 &adev->gfx.sq_irq); 2081 &adev->gfx.sq_irq);
2082 if (r) { 2082 if (r) {
2083 DRM_ERROR("amdgpu_irq_add() for SQ failed: %d\n", r); 2083 DRM_ERROR("amdgpu_irq_add() for SQ failed: %d\n", r);
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index 3b8ac4442f06..e1c2b4e9c7b2 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -859,11 +859,11 @@ static int gmc_v6_0_sw_init(void *handle)
859 adev->gmc.vram_type = gmc_v6_0_convert_vram_type(tmp); 859 adev->gmc.vram_type = gmc_v6_0_convert_vram_type(tmp);
860 } 860 }
861 861
862 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 146, &adev->gmc.vm_fault); 862 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 146, &adev->gmc.vm_fault);
863 if (r) 863 if (r)
864 return r; 864 return r;
865 865
866 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 147, &adev->gmc.vm_fault); 866 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 147, &adev->gmc.vm_fault);
867 if (r) 867 if (r)
868 return r; 868 return r;
869 869
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 899634ce4238..910c4ce19cb3 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -991,11 +991,11 @@ static int gmc_v7_0_sw_init(void *handle)
991 adev->gmc.vram_type = gmc_v7_0_convert_vram_type(tmp); 991 adev->gmc.vram_type = gmc_v7_0_convert_vram_type(tmp);
992 } 992 }
993 993
994 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_PAGE_INV_FAULT, &adev->gmc.vm_fault); 994 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_PAGE_INV_FAULT, &adev->gmc.vm_fault);
995 if (r) 995 if (r)
996 return r; 996 return r;
997 997
998 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_MEM_PROT_FAULT, &adev->gmc.vm_fault); 998 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_MEM_PROT_FAULT, &adev->gmc.vm_fault);
999 if (r) 999 if (r)
1000 return r; 1000 return r;
1001 1001
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index 79143ca7cfac..1d3265c97b70 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -1095,11 +1095,11 @@ static int gmc_v8_0_sw_init(void *handle)
1095 adev->gmc.vram_type = gmc_v8_0_convert_vram_type(tmp); 1095 adev->gmc.vram_type = gmc_v8_0_convert_vram_type(tmp);
1096 } 1096 }
1097 1097
1098 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_PAGE_INV_FAULT, &adev->gmc.vm_fault); 1098 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_PAGE_INV_FAULT, &adev->gmc.vm_fault);
1099 if (r) 1099 if (r)
1100 return r; 1100 return r;
1101 1101
1102 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_MEM_PROT_FAULT, &adev->gmc.vm_fault); 1102 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_MEM_PROT_FAULT, &adev->gmc.vm_fault);
1103 if (r) 1103 if (r)
1104 return r; 1104 return r;
1105 1105
diff --git a/drivers/gpu/drm/amd/amdgpu/iceland_ih.c b/drivers/gpu/drm/amd/amdgpu/iceland_ih.c
index 9005deeec612..cf0fc61aebe6 100644
--- a/drivers/gpu/drm/amd/amdgpu/iceland_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/iceland_ih.c
@@ -255,7 +255,7 @@ static void iceland_ih_decode_iv(struct amdgpu_device *adev,
255 dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]); 255 dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]);
256 dw[3] = le32_to_cpu(adev->irq.ih.ring[ring_index + 3]); 256 dw[3] = le32_to_cpu(adev->irq.ih.ring[ring_index + 3]);
257 257
258 entry->client_id = AMDGPU_IH_CLIENTID_LEGACY; 258 entry->client_id = AMDGPU_IRQ_CLIENTID_LEGACY;
259 entry->src_id = dw[0] & 0xff; 259 entry->src_id = dw[0] & 0xff;
260 entry->src_data[0] = dw[1] & 0xfffffff; 260 entry->src_data[0] = dw[1] & 0xfffffff;
261 entry->ring_id = dw[2] & 0xff; 261 entry->ring_id = dw[2] & 0xff;
diff --git a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
index cb79a93c2eb7..d0e478f43443 100644
--- a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
@@ -2995,12 +2995,12 @@ static int kv_dpm_sw_init(void *handle)
2995 int ret; 2995 int ret;
2996 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 2996 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
2997 2997
2998 ret = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 230, 2998 ret = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 230,
2999 &adev->pm.dpm.thermal.irq); 2999 &adev->pm.dpm.thermal.irq);
3000 if (ret) 3000 if (ret)
3001 return ret; 3001 return ret;
3002 3002
3003 ret = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 231, 3003 ret = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 231,
3004 &adev->pm.dpm.thermal.irq); 3004 &adev->pm.dpm.thermal.irq);
3005 if (ret) 3005 if (ret)
3006 return ret; 3006 return ret;
diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c b/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c
index 842567b53df5..64e875d528dd 100644
--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c
@@ -580,11 +580,11 @@ int xgpu_vi_mailbox_add_irq_id(struct amdgpu_device *adev)
580{ 580{
581 int r; 581 int r;
582 582
583 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 135, &adev->virt.rcv_irq); 583 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 135, &adev->virt.rcv_irq);
584 if (r) 584 if (r)
585 return r; 585 return r;
586 586
587 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 138, &adev->virt.ack_irq); 587 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 138, &adev->virt.ack_irq);
588 if (r) { 588 if (r) {
589 amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0); 589 amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0);
590 return r; 590 return r;
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
index 0c5a576dee13..cd781abc4953 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
@@ -898,19 +898,19 @@ static int sdma_v2_4_sw_init(void *handle)
898 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 898 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
899 899
900 /* SDMA trap event */ 900 /* SDMA trap event */
901 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SDMA_TRAP, 901 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SDMA_TRAP,
902 &adev->sdma.trap_irq); 902 &adev->sdma.trap_irq);
903 if (r) 903 if (r)
904 return r; 904 return r;
905 905
906 /* SDMA Privileged inst */ 906 /* SDMA Privileged inst */
907 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 241, 907 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 241,
908 &adev->sdma.illegal_inst_irq); 908 &adev->sdma.illegal_inst_irq);
909 if (r) 909 if (r)
910 return r; 910 return r;
911 911
912 /* SDMA Privileged inst */ 912 /* SDMA Privileged inst */
913 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SDMA_SRBM_WRITE, 913 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SDMA_SRBM_WRITE,
914 &adev->sdma.illegal_inst_irq); 914 &adev->sdma.illegal_inst_irq);
915 if (r) 915 if (r)
916 return r; 916 return r;
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index 2587b8de918a..6d5c8ac64874 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
@@ -1177,19 +1177,19 @@ static int sdma_v3_0_sw_init(void *handle)
1177 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 1177 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
1178 1178
1179 /* SDMA trap event */ 1179 /* SDMA trap event */
1180 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SDMA_TRAP, 1180 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SDMA_TRAP,
1181 &adev->sdma.trap_irq); 1181 &adev->sdma.trap_irq);
1182 if (r) 1182 if (r)
1183 return r; 1183 return r;
1184 1184
1185 /* SDMA Privileged inst */ 1185 /* SDMA Privileged inst */
1186 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 241, 1186 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 241,
1187 &adev->sdma.illegal_inst_irq); 1187 &adev->sdma.illegal_inst_irq);
1188 if (r) 1188 if (r)
1189 return r; 1189 return r;
1190 1190
1191 /* SDMA Privileged inst */ 1191 /* SDMA Privileged inst */
1192 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SDMA_SRBM_WRITE, 1192 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SDMA_SRBM_WRITE,
1193 &adev->sdma.illegal_inst_irq); 1193 &adev->sdma.illegal_inst_irq);
1194 if (r) 1194 if (r)
1195 return r; 1195 return r;
diff --git a/drivers/gpu/drm/amd/amdgpu/si_dma.c b/drivers/gpu/drm/amd/amdgpu/si_dma.c
index c3510a703f9f..d4ceaf440f26 100644
--- a/drivers/gpu/drm/amd/amdgpu/si_dma.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_dma.c
@@ -502,12 +502,12 @@ static int si_dma_sw_init(void *handle)
502 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 502 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
503 503
504 /* DMA0 trap event */ 504 /* DMA0 trap event */
505 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 224, &adev->sdma.trap_irq); 505 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 224, &adev->sdma.trap_irq);
506 if (r) 506 if (r)
507 return r; 507 return r;
508 508
509 /* DMA1 trap event */ 509 /* DMA1 trap event */
510 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 244, &adev->sdma.trap_irq_1); 510 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 244, &adev->sdma.trap_irq_1);
511 if (r) 511 if (r)
512 return r; 512 return r;
513 513
diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
index 1de96995e690..da58040fdbdc 100644
--- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
@@ -7687,11 +7687,11 @@ static int si_dpm_sw_init(void *handle)
7687 int ret; 7687 int ret;
7688 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 7688 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
7689 7689
7690 ret = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 230, &adev->pm.dpm.thermal.irq); 7690 ret = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 230, &adev->pm.dpm.thermal.irq);
7691 if (ret) 7691 if (ret)
7692 return ret; 7692 return ret;
7693 7693
7694 ret = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 231, &adev->pm.dpm.thermal.irq); 7694 ret = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 231, &adev->pm.dpm.thermal.irq);
7695 if (ret) 7695 if (ret)
7696 return ret; 7696 return ret;
7697 7697
diff --git a/drivers/gpu/drm/amd/amdgpu/si_ih.c b/drivers/gpu/drm/amd/amdgpu/si_ih.c
index acdf6075957a..b3d7d9f83202 100644
--- a/drivers/gpu/drm/amd/amdgpu/si_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_ih.c
@@ -142,7 +142,7 @@ static void si_ih_decode_iv(struct amdgpu_device *adev,
142 dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]); 142 dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]);
143 dw[3] = le32_to_cpu(adev->irq.ih.ring[ring_index + 3]); 143 dw[3] = le32_to_cpu(adev->irq.ih.ring[ring_index + 3]);
144 144
145 entry->client_id = AMDGPU_IH_CLIENTID_LEGACY; 145 entry->client_id = AMDGPU_IRQ_CLIENTID_LEGACY;
146 entry->src_id = dw[0] & 0xff; 146 entry->src_id = dw[0] & 0xff;
147 entry->src_data[0] = dw[1] & 0xfffffff; 147 entry->src_data[0] = dw[1] & 0xfffffff;
148 entry->ring_id = dw[2] & 0xff; 148 entry->ring_id = dw[2] & 0xff;
diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c
index 83fdf810ffc7..3abffd06b5c7 100644
--- a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c
@@ -266,7 +266,7 @@ static void tonga_ih_decode_iv(struct amdgpu_device *adev,
266 dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]); 266 dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]);
267 dw[3] = le32_to_cpu(adev->irq.ih.ring[ring_index + 3]); 267 dw[3] = le32_to_cpu(adev->irq.ih.ring[ring_index + 3]);
268 268
269 entry->client_id = AMDGPU_IH_CLIENTID_LEGACY; 269 entry->client_id = AMDGPU_IRQ_CLIENTID_LEGACY;
270 entry->src_id = dw[0] & 0xff; 270 entry->src_id = dw[0] & 0xff;
271 entry->src_data[0] = dw[1] & 0xfffffff; 271 entry->src_data[0] = dw[1] & 0xfffffff;
272 entry->ring_id = dw[2] & 0xff; 272 entry->ring_id = dw[2] & 0xff;
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
index 8a926d1df939..1fc17bf39fed 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
@@ -108,7 +108,7 @@ static int uvd_v4_2_sw_init(void *handle)
108 int r; 108 int r;
109 109
110 /* UVD TRAP */ 110 /* UVD TRAP */
111 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 124, &adev->uvd.inst->irq); 111 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 124, &adev->uvd.inst->irq);
112 if (r) 112 if (r)
113 return r; 113 return r;
114 114
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
index 50248059412e..fde6ad5ac9ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
@@ -105,7 +105,7 @@ static int uvd_v5_0_sw_init(void *handle)
105 int r; 105 int r;
106 106
107 /* UVD TRAP */ 107 /* UVD TRAP */
108 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_UVD_SYSTEM_MESSAGE, &adev->uvd.inst->irq); 108 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_UVD_SYSTEM_MESSAGE, &adev->uvd.inst->irq);
109 if (r) 109 if (r)
110 return r; 110 return r;
111 111
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index 6ae82cc2e55e..8ef4a5392112 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
@@ -393,14 +393,14 @@ static int uvd_v6_0_sw_init(void *handle)
393 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 393 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
394 394
395 /* UVD TRAP */ 395 /* UVD TRAP */
396 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_UVD_SYSTEM_MESSAGE, &adev->uvd.inst->irq); 396 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_UVD_SYSTEM_MESSAGE, &adev->uvd.inst->irq);
397 if (r) 397 if (r)
398 return r; 398 return r;
399 399
400 /* UVD ENC TRAP */ 400 /* UVD ENC TRAP */
401 if (uvd_v6_0_enc_support(adev)) { 401 if (uvd_v6_0_enc_support(adev)) {
402 for (i = 0; i < adev->uvd.num_enc_rings; ++i) { 402 for (i = 0; i < adev->uvd.num_enc_rings; ++i) {
403 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, i + VISLANDS30_IV_SRCID_UVD_ENC_GEN_PURP, &adev->uvd.inst->irq); 403 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + VISLANDS30_IV_SRCID_UVD_ENC_GEN_PURP, &adev->uvd.inst->irq);
404 if (r) 404 if (r)
405 return r; 405 return r;
406 } 406 }
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
index 7eaa54ba016b..ea28828360d3 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
@@ -417,7 +417,7 @@ static int vce_v2_0_sw_init(void *handle)
417 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 417 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
418 418
419 /* VCE */ 419 /* VCE */
420 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, 167, &adev->vce.irq); 420 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 167, &adev->vce.irq);
421 if (r) 421 if (r)
422 return r; 422 return r;
423 423
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
index c8390f9adfd6..6dbd39730070 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
@@ -423,7 +423,7 @@ static int vce_v3_0_sw_init(void *handle)
423 int r, i; 423 int r, i;
424 424
425 /* VCE */ 425 /* VCE */
426 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_VCE_TRAP, &adev->vce.irq); 426 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_VCE_TRAP, &adev->vce.irq);
427 if (r) 427 if (r)
428 return r; 428 return r;
429 429