diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 31 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/vi.c | 7 |
2 files changed, 38 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c index 2b86569b18d3..8f4aac23b317 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | |||
@@ -53,6 +53,8 @@ MODULE_FIRMWARE("amdgpu/tonga_sdma.bin"); | |||
53 | MODULE_FIRMWARE("amdgpu/tonga_sdma1.bin"); | 53 | MODULE_FIRMWARE("amdgpu/tonga_sdma1.bin"); |
54 | MODULE_FIRMWARE("amdgpu/carrizo_sdma.bin"); | 54 | MODULE_FIRMWARE("amdgpu/carrizo_sdma.bin"); |
55 | MODULE_FIRMWARE("amdgpu/carrizo_sdma1.bin"); | 55 | MODULE_FIRMWARE("amdgpu/carrizo_sdma1.bin"); |
56 | MODULE_FIRMWARE("amdgpu/fiji_sdma.bin"); | ||
57 | MODULE_FIRMWARE("amdgpu/fiji_sdma1.bin"); | ||
56 | 58 | ||
57 | static const u32 sdma_offsets[SDMA_MAX_INSTANCE] = | 59 | static const u32 sdma_offsets[SDMA_MAX_INSTANCE] = |
58 | { | 60 | { |
@@ -80,6 +82,24 @@ static const u32 tonga_mgcg_cgcg_init[] = | |||
80 | mmSDMA1_CLK_CTRL, 0xff000ff0, 0x00000100 | 82 | mmSDMA1_CLK_CTRL, 0xff000ff0, 0x00000100 |
81 | }; | 83 | }; |
82 | 84 | ||
85 | static const u32 golden_settings_fiji_a10[] = | ||
86 | { | ||
87 | mmSDMA0_CHICKEN_BITS, 0xfc910007, 0x00810007, | ||
88 | mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100, | ||
89 | mmSDMA0_RLC0_IB_CNTL, 0x800f0111, 0x00000100, | ||
90 | mmSDMA0_RLC1_IB_CNTL, 0x800f0111, 0x00000100, | ||
91 | mmSDMA1_CHICKEN_BITS, 0xfc910007, 0x00810007, | ||
92 | mmSDMA1_GFX_IB_CNTL, 0x800f0111, 0x00000100, | ||
93 | mmSDMA1_RLC0_IB_CNTL, 0x800f0111, 0x00000100, | ||
94 | mmSDMA1_RLC1_IB_CNTL, 0x800f0111, 0x00000100, | ||
95 | }; | ||
96 | |||
97 | static const u32 fiji_mgcg_cgcg_init[] = | ||
98 | { | ||
99 | mmSDMA0_CLK_CTRL, 0xff000ff0, 0x00000100, | ||
100 | mmSDMA1_CLK_CTRL, 0xff000ff0, 0x00000100 | ||
101 | }; | ||
102 | |||
83 | static const u32 cz_golden_settings_a11[] = | 103 | static const u32 cz_golden_settings_a11[] = |
84 | { | 104 | { |
85 | mmSDMA0_CHICKEN_BITS, 0xfc910007, 0x00810007, | 105 | mmSDMA0_CHICKEN_BITS, 0xfc910007, 0x00810007, |
@@ -122,6 +142,14 @@ static const u32 cz_mgcg_cgcg_init[] = | |||
122 | static void sdma_v3_0_init_golden_registers(struct amdgpu_device *adev) | 142 | static void sdma_v3_0_init_golden_registers(struct amdgpu_device *adev) |
123 | { | 143 | { |
124 | switch (adev->asic_type) { | 144 | switch (adev->asic_type) { |
145 | case CHIP_FIJI: | ||
146 | amdgpu_program_register_sequence(adev, | ||
147 | fiji_mgcg_cgcg_init, | ||
148 | (const u32)ARRAY_SIZE(fiji_mgcg_cgcg_init)); | ||
149 | amdgpu_program_register_sequence(adev, | ||
150 | golden_settings_fiji_a10, | ||
151 | (const u32)ARRAY_SIZE(golden_settings_fiji_a10)); | ||
152 | break; | ||
125 | case CHIP_TONGA: | 153 | case CHIP_TONGA: |
126 | amdgpu_program_register_sequence(adev, | 154 | amdgpu_program_register_sequence(adev, |
127 | tonga_mgcg_cgcg_init, | 155 | tonga_mgcg_cgcg_init, |
@@ -167,6 +195,9 @@ static int sdma_v3_0_init_microcode(struct amdgpu_device *adev) | |||
167 | case CHIP_TONGA: | 195 | case CHIP_TONGA: |
168 | chip_name = "tonga"; | 196 | chip_name = "tonga"; |
169 | break; | 197 | break; |
198 | case CHIP_FIJI: | ||
199 | chip_name = "fiji"; | ||
200 | break; | ||
170 | case CHIP_CARRIZO: | 201 | case CHIP_CARRIZO: |
171 | chip_name = "carrizo"; | 202 | chip_name = "carrizo"; |
172 | break; | 203 | break; |
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c index 0cd248b937e8..8881dd82fd68 100644 --- a/drivers/gpu/drm/amd/amdgpu/vi.c +++ b/drivers/gpu/drm/amd/amdgpu/vi.c | |||
@@ -1209,6 +1209,13 @@ static const struct amdgpu_ip_block_version fiji_ip_blocks[] = | |||
1209 | .rev = 0, | 1209 | .rev = 0, |
1210 | .funcs = &gfx_v8_0_ip_funcs, | 1210 | .funcs = &gfx_v8_0_ip_funcs, |
1211 | }, | 1211 | }, |
1212 | { | ||
1213 | .type = AMD_IP_BLOCK_TYPE_SDMA, | ||
1214 | .major = 3, | ||
1215 | .minor = 0, | ||
1216 | .rev = 0, | ||
1217 | .funcs = &sdma_v3_0_ip_funcs, | ||
1218 | }, | ||
1212 | }; | 1219 | }; |
1213 | 1220 | ||
1214 | static const struct amdgpu_ip_block_version cz_ip_blocks[] = | 1221 | static const struct amdgpu_ip_block_version cz_ip_blocks[] = |