1 files changed, 14 insertions, 8 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 9ff69b90df36..f3cfef48aa99 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1254,7 +1254,6 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
         uint32_t msg_id, pp_state = 0;
         uint32_t pp_support_state = 0;
         struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-        void *pp_handle = adev->powerplay.pp_handle;
 
         if (adev->cg_flags & (AMD_CG_SUPPORT_MC_LS | AMD_CG_SUPPORT_MC_MGCG)) {
                 if (adev->cg_flags & AMD_CG_SUPPORT_MC_LS) {
@@ -1271,7 +1270,8 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                                PP_BLOCK_SYS_MC,
                                pp_support_state,
                                pp_state);
-                amd_set_clockgating_by_smu(pp_handle, msg_id);
+                if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
+                        amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
         }
 
         if (adev->cg_flags & (AMD_CG_SUPPORT_SDMA_LS | AMD_CG_SUPPORT_SDMA_MGCG)) {
@@ -1289,7 +1289,8 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                                PP_BLOCK_SYS_SDMA,
                                pp_support_state,
                                pp_state);
-                amd_set_clockgating_by_smu(pp_handle, msg_id);
+                if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
+                        amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
         }
 
         if (adev->cg_flags & (AMD_CG_SUPPORT_HDP_LS | AMD_CG_SUPPORT_HDP_MGCG)) {
@@ -1307,7 +1308,8 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                                PP_BLOCK_SYS_HDP,
                                pp_support_state,
                                pp_state);
-                amd_set_clockgating_by_smu(pp_handle, msg_id);
+                if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
+                        amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
         }
 
 
@@ -1321,7 +1323,8 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                                PP_BLOCK_SYS_BIF,
                                PP_STATE_SUPPORT_LS,
                                 pp_state);
-                amd_set_clockgating_by_smu(pp_handle, msg_id);
+                if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
+                        amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
         }
         if (adev->cg_flags & AMD_CG_SUPPORT_BIF_MGCG) {
                 if (state == AMD_CG_STATE_UNGATE)
@@ -1333,7 +1336,8 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                                PP_BLOCK_SYS_BIF,
                                PP_STATE_SUPPORT_CG,
                                pp_state);
-                amd_set_clockgating_by_smu(pp_handle, msg_id);
+                if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
+                        amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
         }
 
         if (adev->cg_flags & AMD_CG_SUPPORT_DRM_LS) {
@@ -1347,7 +1351,8 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                                PP_BLOCK_SYS_DRM,
                                PP_STATE_SUPPORT_LS,
                                pp_state);
-                amd_set_clockgating_by_smu(pp_handle, msg_id);
+                if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
+                        amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
         }
 
         if (adev->cg_flags & AMD_CG_SUPPORT_ROM_MGCG) {
@@ -1361,7 +1366,8 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                                PP_BLOCK_SYS_ROM,
                                PP_STATE_SUPPORT_CG,
                                pp_state);
-                amd_set_clockgating_by_smu(pp_handle, msg_id);
+                if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
+                        amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
         }
         return 0;
 }