1 files changed, 21 insertions, 12 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 2a7d37acc91c..7d03ea196aef 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1203,8 +1203,8 @@ static int vi_common_soft_reset(void *handle)
         return 0;
 }
 
-static void fiji_update_bif_medium_grain_light_sleep(struct amdgpu_device *adev,
-                                                     bool enable)
+static void vi_update_bif_medium_grain_light_sleep(struct amdgpu_device *adev,
+                                                   bool enable)
 {
         uint32_t temp, data;
 
@@ -1223,8 +1223,8 @@ static void fiji_update_bif_medium_grain_light_sleep(struct amdgpu_device *adev,
                 WREG32_PCIE(ixPCIE_CNTL2, data);
 }
 
-static void fiji_update_hdp_medium_grain_clock_gating(struct amdgpu_device *adev,
-                                                      bool enable)
+static void vi_update_hdp_medium_grain_clock_gating(struct amdgpu_device *adev,
+                                                    bool enable)
 {
         uint32_t temp, data;
 
@@ -1239,8 +1239,8 @@ static void fiji_update_hdp_medium_grain_clock_gating(struct amdgpu_device *adev
                 WREG32(mmHDP_HOST_PATH_CNTL, data);
 }
 
-static void fiji_update_hdp_light_sleep(struct amdgpu_device *adev,
-                bool enable)
+static void vi_update_hdp_light_sleep(struct amdgpu_device *adev,
+                                      bool enable)
 {
         uint32_t temp, data;
 
@@ -1255,8 +1255,8 @@ static void fiji_update_hdp_light_sleep(struct amdgpu_device *adev,
                 WREG32(mmHDP_MEM_POWER_LS, data);
 }
 
-static void fiji_update_rom_medium_grain_clock_gating(struct amdgpu_device *adev,
-                                                      bool enable)
+static void vi_update_rom_medium_grain_clock_gating(struct amdgpu_device *adev,
+                                                    bool enable)
 {
         uint32_t temp, data;
 
@@ -1280,13 +1280,22 @@ static int vi_common_set_clockgating_state(void *handle,
 
         switch (adev->asic_type) {
         case CHIP_FIJI:
-                fiji_update_bif_medium_grain_light_sleep(adev,
+                vi_update_bif_medium_grain_light_sleep(adev,
                                 state == AMD_CG_STATE_GATE ? true : false);
-                fiji_update_hdp_medium_grain_clock_gating(adev,
+                vi_update_hdp_medium_grain_clock_gating(adev,
                                 state == AMD_CG_STATE_GATE ? true : false);
-                fiji_update_hdp_light_sleep(adev,
+                vi_update_hdp_light_sleep(adev,
                                 state == AMD_CG_STATE_GATE ? true : false);
-                fiji_update_rom_medium_grain_clock_gating(adev,
+                vi_update_rom_medium_grain_clock_gating(adev,
+                                state == AMD_CG_STATE_GATE ? true : false);
+                break;
+        case CHIP_CARRIZO:
+        case CHIP_STONEY:
+                vi_update_bif_medium_grain_light_sleep(adev,
+                                state == AMD_CG_STATE_GATE ? true : false);
+                vi_update_hdp_medium_grain_clock_gating(adev,
+                                state == AMD_CG_STATE_GATE ? true : false);
+                vi_update_hdp_light_sleep(adev,
                                 state == AMD_CG_STATE_GATE ? true : false);
                 break;
         default: