diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c index b7bdd04793d6..45aafca7f315 100644 --- a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c +++ b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | |||
@@ -24,7 +24,8 @@ | |||
24 | #include "soc15.h" | 24 | #include "soc15.h" |
25 | 25 | ||
26 | #include "soc15_common.h" | 26 | #include "soc15_common.h" |
27 | #include "soc15ip.h" | 27 | #include "soc15_hw_ip.h" |
28 | #include "vega10_ip_offset.h" | ||
28 | 29 | ||
29 | int vega10_reg_base_init(struct amdgpu_device *adev) | 30 | int vega10_reg_base_init(struct amdgpu_device *adev) |
30 | { | 31 | { |
@@ -37,6 +38,7 @@ int vega10_reg_base_init(struct amdgpu_device *adev) | |||
37 | adev->reg_offset[ATHUB_HWIP][i] = (uint32_t *)(&(ATHUB_BASE.instance[i])); | 38 | adev->reg_offset[ATHUB_HWIP][i] = (uint32_t *)(&(ATHUB_BASE.instance[i])); |
38 | adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIO_BASE.instance[i])); | 39 | adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIO_BASE.instance[i])); |
39 | adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); | 40 | adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); |
41 | adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i])); | ||
40 | adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i])); | 42 | adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i])); |
41 | adev->reg_offset[VCE_HWIP][i] = (uint32_t *)(&(VCE_BASE.instance[i])); | 43 | adev->reg_offset[VCE_HWIP][i] = (uint32_t *)(&(VCE_BASE.instance[i])); |
42 | adev->reg_offset[VCN_HWIP][i] = (uint32_t *)(&(VCN_BASE.instance[i])); | 44 | adev->reg_offset[VCN_HWIP][i] = (uint32_t *)(&(VCN_BASE.instance[i])); |
@@ -48,7 +50,7 @@ int vega10_reg_base_init(struct amdgpu_device *adev) | |||
48 | adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i])); | 50 | adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i])); |
49 | adev->reg_offset[PWR_HWIP][i] = (uint32_t *)(&(PWR_BASE.instance[i])); | 51 | adev->reg_offset[PWR_HWIP][i] = (uint32_t *)(&(PWR_BASE.instance[i])); |
50 | adev->reg_offset[NBIF_HWIP][i] = (uint32_t *)(&(NBIF_BASE.instance[i])); | 52 | adev->reg_offset[NBIF_HWIP][i] = (uint32_t *)(&(NBIF_BASE.instance[i])); |
51 | 53 | adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i])); | |
52 | } | 54 | } |
53 | return 0; | 55 | return 0; |
54 | } | 56 | } |