diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 21 |
1 files changed, 5 insertions, 16 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c index 400c16fe579e..9e695e01f8b8 100644 --- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | |||
@@ -577,20 +577,6 @@ static void uvd_v5_0_ring_emit_ib(struct amdgpu_ring *ring, | |||
577 | amdgpu_ring_write(ring, ib->length_dw); | 577 | amdgpu_ring_write(ring, ib->length_dw); |
578 | } | 578 | } |
579 | 579 | ||
580 | static unsigned uvd_v5_0_ring_get_emit_ib_size(struct amdgpu_ring *ring) | ||
581 | { | ||
582 | return | ||
583 | 6; /* uvd_v5_0_ring_emit_ib */ | ||
584 | } | ||
585 | |||
586 | static unsigned uvd_v5_0_ring_get_dma_frame_size(struct amdgpu_ring *ring) | ||
587 | { | ||
588 | return | ||
589 | 2 + /* uvd_v5_0_ring_emit_hdp_flush */ | ||
590 | 2 + /* uvd_v5_0_ring_emit_hdp_invalidate */ | ||
591 | 14; /* uvd_v5_0_ring_emit_fence x1 no user fence */ | ||
592 | } | ||
593 | |||
594 | static bool uvd_v5_0_is_idle(void *handle) | 580 | static bool uvd_v5_0_is_idle(void *handle) |
595 | { | 581 | { |
596 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | 582 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
@@ -811,6 +797,11 @@ static const struct amdgpu_ring_funcs uvd_v5_0_ring_funcs = { | |||
811 | .get_wptr = uvd_v5_0_ring_get_wptr, | 797 | .get_wptr = uvd_v5_0_ring_get_wptr, |
812 | .set_wptr = uvd_v5_0_ring_set_wptr, | 798 | .set_wptr = uvd_v5_0_ring_set_wptr, |
813 | .parse_cs = amdgpu_uvd_ring_parse_cs, | 799 | .parse_cs = amdgpu_uvd_ring_parse_cs, |
800 | .emit_frame_size = | ||
801 | 2 + /* uvd_v5_0_ring_emit_hdp_flush */ | ||
802 | 2 + /* uvd_v5_0_ring_emit_hdp_invalidate */ | ||
803 | 14, /* uvd_v5_0_ring_emit_fence x1 no user fence */ | ||
804 | .emit_ib_size = 6, /* uvd_v5_0_ring_emit_ib */ | ||
814 | .emit_ib = uvd_v5_0_ring_emit_ib, | 805 | .emit_ib = uvd_v5_0_ring_emit_ib, |
815 | .emit_fence = uvd_v5_0_ring_emit_fence, | 806 | .emit_fence = uvd_v5_0_ring_emit_fence, |
816 | .emit_hdp_flush = uvd_v5_0_ring_emit_hdp_flush, | 807 | .emit_hdp_flush = uvd_v5_0_ring_emit_hdp_flush, |
@@ -821,8 +812,6 @@ static const struct amdgpu_ring_funcs uvd_v5_0_ring_funcs = { | |||
821 | .pad_ib = amdgpu_ring_generic_pad_ib, | 812 | .pad_ib = amdgpu_ring_generic_pad_ib, |
822 | .begin_use = amdgpu_uvd_ring_begin_use, | 813 | .begin_use = amdgpu_uvd_ring_begin_use, |
823 | .end_use = amdgpu_uvd_ring_end_use, | 814 | .end_use = amdgpu_uvd_ring_end_use, |
824 | .get_emit_ib_size = uvd_v5_0_ring_get_emit_ib_size, | ||
825 | .get_dma_frame_size = uvd_v5_0_ring_get_dma_frame_size, | ||
826 | }; | 815 | }; |
827 | 816 | ||
828 | static void uvd_v5_0_set_ring_funcs(struct amdgpu_device *adev) | 817 | static void uvd_v5_0_set_ring_funcs(struct amdgpu_device *adev) |