diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/soc15.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc15.c | 19 |
1 files changed, 2 insertions, 17 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c index 245a18aeb389..1c006ba9d826 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.c +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c | |||
@@ -101,7 +101,7 @@ static u32 soc15_pcie_rreg(struct amdgpu_device *adev, u32 reg) | |||
101 | { | 101 | { |
102 | unsigned long flags, address, data; | 102 | unsigned long flags, address, data; |
103 | u32 r; | 103 | u32 r; |
104 | struct nbio_pcie_index_data *nbio_pcie_id; | 104 | const struct nbio_pcie_index_data *nbio_pcie_id; |
105 | 105 | ||
106 | if (adev->flags & AMD_IS_APU) | 106 | if (adev->flags & AMD_IS_APU) |
107 | nbio_pcie_id = &nbio_v7_0_pcie_index_data; | 107 | nbio_pcie_id = &nbio_v7_0_pcie_index_data; |
@@ -122,7 +122,7 @@ static u32 soc15_pcie_rreg(struct amdgpu_device *adev, u32 reg) | |||
122 | static void soc15_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v) | 122 | static void soc15_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v) |
123 | { | 123 | { |
124 | unsigned long flags, address, data; | 124 | unsigned long flags, address, data; |
125 | struct nbio_pcie_index_data *nbio_pcie_id; | 125 | const struct nbio_pcie_index_data *nbio_pcie_id; |
126 | 126 | ||
127 | if (adev->flags & AMD_IS_APU) | 127 | if (adev->flags & AMD_IS_APU) |
128 | nbio_pcie_id = &nbio_v7_0_pcie_index_data; | 128 | nbio_pcie_id = &nbio_v7_0_pcie_index_data; |
@@ -604,21 +604,6 @@ static int soc15_common_early_init(void *handle) | |||
604 | (amdgpu_ip_block_mask & (1 << AMD_IP_BLOCK_TYPE_PSP))) | 604 | (amdgpu_ip_block_mask & (1 << AMD_IP_BLOCK_TYPE_PSP))) |
605 | psp_enabled = true; | 605 | psp_enabled = true; |
606 | 606 | ||
607 | /* | ||
608 | * nbio need be used for both sdma and gfx9, but only | ||
609 | * initializes once | ||
610 | */ | ||
611 | switch(adev->asic_type) { | ||
612 | case CHIP_VEGA10: | ||
613 | nbio_v6_1_init(adev); | ||
614 | break; | ||
615 | case CHIP_RAVEN: | ||
616 | nbio_v7_0_init(adev); | ||
617 | break; | ||
618 | default: | ||
619 | return -EINVAL; | ||
620 | } | ||
621 | |||
622 | adev->rev_id = soc15_get_rev_id(adev); | 607 | adev->rev_id = soc15_get_rev_id(adev); |
623 | adev->external_rev_id = 0xFF; | 608 | adev->external_rev_id = 0xFF; |
624 | switch (adev->asic_type) { | 609 | switch (adev->asic_type) { |