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path: root/drivers/gpu/drm/amd/amdgpu/si_dpm.c
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Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/si_dpm.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/si_dpm.c10
1 files changed, 3 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
index 51fd0c9a20a5..299cb3161b2c 100644
--- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
@@ -5845,9 +5845,9 @@ static int si_set_mc_special_registers(struct amdgpu_device *adev,
5845 ((temp_reg & 0xffff0000)) | 5845 ((temp_reg & 0xffff0000)) |
5846 ((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16); 5846 ((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16);
5847 j++; 5847 j++;
5848
5848 if (j >= SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE) 5849 if (j >= SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE)
5849 return -EINVAL; 5850 return -EINVAL;
5850
5851 temp_reg = RREG32(MC_PMG_CMD_MRS); 5851 temp_reg = RREG32(MC_PMG_CMD_MRS);
5852 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS; 5852 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS;
5853 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP; 5853 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP;
@@ -5859,18 +5859,16 @@ static int si_set_mc_special_registers(struct amdgpu_device *adev,
5859 table->mc_reg_table_entry[k].mc_data[j] |= 0x100; 5859 table->mc_reg_table_entry[k].mc_data[j] |= 0x100;
5860 } 5860 }
5861 j++; 5861 j++;
5862 if (j >= SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE)
5863 return -EINVAL;
5864 5862
5865 if (adev->mc.vram_type != AMDGPU_VRAM_TYPE_GDDR5) { 5863 if (adev->mc.vram_type != AMDGPU_VRAM_TYPE_GDDR5) {
5864 if (j >= SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE)
5865 return -EINVAL;
5866 table->mc_reg_address[j].s1 = MC_PMG_AUTO_CMD; 5866 table->mc_reg_address[j].s1 = MC_PMG_AUTO_CMD;
5867 table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD; 5867 table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD;
5868 for (k = 0; k < table->num_entries; k++) 5868 for (k = 0; k < table->num_entries; k++)
5869 table->mc_reg_table_entry[k].mc_data[j] = 5869 table->mc_reg_table_entry[k].mc_data[j] =
5870 (table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16; 5870 (table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16;
5871 j++; 5871 j++;
5872 if (j >= SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE)
5873 return -EINVAL;
5874 } 5872 }
5875 break; 5873 break;
5876 case MC_SEQ_RESERVE_M: 5874 case MC_SEQ_RESERVE_M:
@@ -5882,8 +5880,6 @@ static int si_set_mc_special_registers(struct amdgpu_device *adev,
5882 (temp_reg & 0xffff0000) | 5880 (temp_reg & 0xffff0000) |
5883 (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); 5881 (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
5884 j++; 5882 j++;
5885 if (j >= SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE)
5886 return -EINVAL;
5887 break; 5883 break;
5888 default: 5884 default:
5889 break; 5885 break;