diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/si_dma.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/si_dma.c | 45 |
1 files changed, 22 insertions, 23 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/si_dma.c b/drivers/gpu/drm/amd/amdgpu/si_dma.c index de358193a8f9..14265c5c349e 100644 --- a/drivers/gpu/drm/amd/amdgpu/si_dma.c +++ b/drivers/gpu/drm/amd/amdgpu/si_dma.c | |||
@@ -495,22 +495,6 @@ static void si_dma_ring_emit_vm_flush(struct amdgpu_ring *ring, | |||
495 | amdgpu_ring_write(ring, (0 << 28) | 0x20); /* func(always) | poll interval */ | 495 | amdgpu_ring_write(ring, (0 << 28) | 0x20); /* func(always) | poll interval */ |
496 | } | 496 | } |
497 | 497 | ||
498 | static unsigned si_dma_ring_get_emit_ib_size(struct amdgpu_ring *ring) | ||
499 | { | ||
500 | return | ||
501 | 7 + 3; /* si_dma_ring_emit_ib */ | ||
502 | } | ||
503 | |||
504 | static unsigned si_dma_ring_get_dma_frame_size(struct amdgpu_ring *ring) | ||
505 | { | ||
506 | return | ||
507 | 3 + /* si_dma_ring_emit_hdp_flush */ | ||
508 | 3 + /* si_dma_ring_emit_hdp_invalidate */ | ||
509 | 6 + /* si_dma_ring_emit_pipeline_sync */ | ||
510 | 12 + /* si_dma_ring_emit_vm_flush */ | ||
511 | 9 + 9 + 9; /* si_dma_ring_emit_fence x3 for user fence, vm fence */ | ||
512 | } | ||
513 | |||
514 | static int si_dma_early_init(void *handle) | 498 | static int si_dma_early_init(void *handle) |
515 | { | 499 | { |
516 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | 500 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
@@ -547,11 +531,10 @@ static int si_dma_sw_init(void *handle) | |||
547 | ring->use_doorbell = false; | 531 | ring->use_doorbell = false; |
548 | sprintf(ring->name, "sdma%d", i); | 532 | sprintf(ring->name, "sdma%d", i); |
549 | r = amdgpu_ring_init(adev, ring, 1024, | 533 | r = amdgpu_ring_init(adev, ring, 1024, |
550 | DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0, 0), 0xf, | ||
551 | &adev->sdma.trap_irq, | 534 | &adev->sdma.trap_irq, |
552 | (i == 0) ? | 535 | (i == 0) ? |
553 | AMDGPU_SDMA_IRQ_TRAP0 : AMDGPU_SDMA_IRQ_TRAP1, | 536 | AMDGPU_SDMA_IRQ_TRAP0 : |
554 | AMDGPU_RING_TYPE_SDMA); | 537 | AMDGPU_SDMA_IRQ_TRAP1); |
555 | if (r) | 538 | if (r) |
556 | return r; | 539 | return r; |
557 | } | 540 | } |
@@ -762,7 +745,7 @@ static int si_dma_set_powergating_state(void *handle, | |||
762 | return 0; | 745 | return 0; |
763 | } | 746 | } |
764 | 747 | ||
765 | const struct amd_ip_funcs si_dma_ip_funcs = { | 748 | static const struct amd_ip_funcs si_dma_ip_funcs = { |
766 | .name = "si_dma", | 749 | .name = "si_dma", |
767 | .early_init = si_dma_early_init, | 750 | .early_init = si_dma_early_init, |
768 | .late_init = NULL, | 751 | .late_init = NULL, |
@@ -780,10 +763,19 @@ const struct amd_ip_funcs si_dma_ip_funcs = { | |||
780 | }; | 763 | }; |
781 | 764 | ||
782 | static const struct amdgpu_ring_funcs si_dma_ring_funcs = { | 765 | static const struct amdgpu_ring_funcs si_dma_ring_funcs = { |
766 | .type = AMDGPU_RING_TYPE_SDMA, | ||
767 | .align_mask = 0xf, | ||
768 | .nop = DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0, 0), | ||
783 | .get_rptr = si_dma_ring_get_rptr, | 769 | .get_rptr = si_dma_ring_get_rptr, |
784 | .get_wptr = si_dma_ring_get_wptr, | 770 | .get_wptr = si_dma_ring_get_wptr, |
785 | .set_wptr = si_dma_ring_set_wptr, | 771 | .set_wptr = si_dma_ring_set_wptr, |
786 | .parse_cs = NULL, | 772 | .emit_frame_size = |
773 | 3 + /* si_dma_ring_emit_hdp_flush */ | ||
774 | 3 + /* si_dma_ring_emit_hdp_invalidate */ | ||
775 | 6 + /* si_dma_ring_emit_pipeline_sync */ | ||
776 | 12 + /* si_dma_ring_emit_vm_flush */ | ||
777 | 9 + 9 + 9, /* si_dma_ring_emit_fence x3 for user fence, vm fence */ | ||
778 | .emit_ib_size = 7 + 3, /* si_dma_ring_emit_ib */ | ||
787 | .emit_ib = si_dma_ring_emit_ib, | 779 | .emit_ib = si_dma_ring_emit_ib, |
788 | .emit_fence = si_dma_ring_emit_fence, | 780 | .emit_fence = si_dma_ring_emit_fence, |
789 | .emit_pipeline_sync = si_dma_ring_emit_pipeline_sync, | 781 | .emit_pipeline_sync = si_dma_ring_emit_pipeline_sync, |
@@ -794,8 +786,6 @@ static const struct amdgpu_ring_funcs si_dma_ring_funcs = { | |||
794 | .test_ib = si_dma_ring_test_ib, | 786 | .test_ib = si_dma_ring_test_ib, |
795 | .insert_nop = amdgpu_ring_insert_nop, | 787 | .insert_nop = amdgpu_ring_insert_nop, |
796 | .pad_ib = si_dma_ring_pad_ib, | 788 | .pad_ib = si_dma_ring_pad_ib, |
797 | .get_emit_ib_size = si_dma_ring_get_emit_ib_size, | ||
798 | .get_dma_frame_size = si_dma_ring_get_dma_frame_size, | ||
799 | }; | 789 | }; |
800 | 790 | ||
801 | static void si_dma_set_ring_funcs(struct amdgpu_device *adev) | 791 | static void si_dma_set_ring_funcs(struct amdgpu_device *adev) |
@@ -913,3 +903,12 @@ static void si_dma_set_vm_pte_funcs(struct amdgpu_device *adev) | |||
913 | adev->vm_manager.vm_pte_num_rings = adev->sdma.num_instances; | 903 | adev->vm_manager.vm_pte_num_rings = adev->sdma.num_instances; |
914 | } | 904 | } |
915 | } | 905 | } |
906 | |||
907 | const struct amdgpu_ip_block_version si_dma_ip_block = | ||
908 | { | ||
909 | .type = AMD_IP_BLOCK_TYPE_SDMA, | ||
910 | .major = 1, | ||
911 | .minor = 0, | ||
912 | .rev = 0, | ||
913 | .funcs = &si_dma_ip_funcs, | ||
914 | }; | ||