1 files changed, 15 insertions, 53 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
index 8785ca570729..f5a343cb0010 100644
--- a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
@@ -1550,11 +1550,6 @@ static int kv_update_vce_dpm(struct amdgpu_device *adev,
 
         if (amdgpu_new_state->evclk > 0 && amdgpu_current_state->evclk == 0) {
                 kv_dpm_powergate_vce(adev, false);
-                /* turn the clocks on when encoding */
-                ret = amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
-                                                    AMD_CG_STATE_UNGATE);
-                if (ret)
-                        return ret;
                 if (pi->caps_stable_p_state)
                         pi->vce_boot_level = table->count - 1;
                 else
@@ -1573,15 +1568,9 @@ static int kv_update_vce_dpm(struct amdgpu_device *adev,
                         amdgpu_kv_send_msg_to_smc_with_parameter(adev,
                                                           PPSMC_MSG_VCEDPM_SetEnabledMask,
                                                           (1 << pi->vce_boot_level));
-
                 kv_enable_vce_dpm(adev, true);
         } else if (amdgpu_new_state->evclk == 0 && amdgpu_current_state->evclk > 0) {
                 kv_enable_vce_dpm(adev, false);
-                /* turn the clocks off when not encoding */
-                ret = amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
-                                                    AMD_CG_STATE_GATE);
-                if (ret)
-                        return ret;
                 kv_dpm_powergate_vce(adev, true);
         }
 
@@ -1688,70 +1677,44 @@ static void kv_dpm_powergate_uvd(struct amdgpu_device *adev, bool gate)
         struct kv_power_info *pi = kv_get_pi(adev);
         int ret;
 
-        if (pi->uvd_power_gated == gate)
-                return;
-
         pi->uvd_power_gated = gate;
 
         if (gate) {
-                if (pi->caps_uvd_pg) {
-                        /* disable clockgating so we can properly shut down the block */
-                        ret = amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_UVD,
-                                                            AMD_CG_STATE_UNGATE);
-                        /* shutdown the UVD block */
-                        ret = amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_UVD,
-                                                            AMD_PG_STATE_GATE);
-                        /* XXX: check for errors */
-                }
+                /* stop the UVD block */
+                ret = amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_UVD,
+                                                        AMD_PG_STATE_GATE);
                 kv_update_uvd_dpm(adev, gate);
                 if (pi->caps_uvd_pg)
                         /* power off the UVD block */
                         amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_UVDPowerOFF);
         } else {
-                if (pi->caps_uvd_pg) {
+                if (pi->caps_uvd_pg)
                         /* power on the UVD block */
                         amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_UVDPowerON);
                         /* re-init the UVD block */
-                        ret = amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_UVD,
-                                                            AMD_PG_STATE_UNGATE);
-                        /* enable clockgating. hw will dynamically gate/ungate clocks on the fly */
-                        ret = amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_UVD,
-                                                            AMD_CG_STATE_GATE);
-                        /* XXX: check for errors */
-                }
                 kv_update_uvd_dpm(adev, gate);
+
+                ret = amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_UVD,
+                                                        AMD_PG_STATE_UNGATE);
         }
 }
 
 static void kv_dpm_powergate_vce(struct amdgpu_device *adev, bool gate)
 {
         struct kv_power_info *pi = kv_get_pi(adev);
-        int ret;
 
         if (pi->vce_power_gated == gate)
                 return;
 
         pi->vce_power_gated = gate;
 
-        if (gate) {
-                if (pi->caps_vce_pg) {
-                        /* shutdown the VCE block */
-                        ret = amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
-                                                            AMD_PG_STATE_GATE);
-                        /* XXX: check for errors */
-                        /* power off the VCE block */
-                        amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerOFF);
-                }
-        } else {
-                if (pi->caps_vce_pg) {
-                        /* power on the VCE block */
-                        amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerON);
-                        /* re-init the VCE block */
-                        ret = amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
-                                                            AMD_PG_STATE_UNGATE);
-                        /* XXX: check for errors */
-                }
-        }
+        if (!pi->caps_vce_pg)
+                return;
+
+        if (gate)
+                amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerOFF);
+        else
+                amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerON);
 }
 
 static void kv_dpm_powergate_samu(struct amdgpu_device *adev, bool gate)
@@ -3009,8 +2972,7 @@ static int kv_dpm_late_init(void *handle)
 
         kv_dpm_powergate_acp(adev, true);
         kv_dpm_powergate_samu(adev, true);
-        kv_dpm_powergate_vce(adev, true);
-        kv_dpm_powergate_uvd(adev, true);
+
         return 0;
 }