aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c9
1 files changed, 2 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index fc8c46209db4..63ed3b01cea1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -3610,7 +3610,7 @@ static void gfx_v8_0_ring_set_wptr_gfx(struct amdgpu_ring *ring)
3610 } 3610 }
3611} 3611}
3612 3612
3613static void gfx_v8_0_hdp_flush_cp_ring_emit(struct amdgpu_ring *ring) 3613static void gfx_v8_0_ring_emit_hdp_flush(struct amdgpu_ring *ring)
3614{ 3614{
3615 u32 ref_and_mask, reg_mem_engine; 3615 u32 ref_and_mask, reg_mem_engine;
3616 3616
@@ -3657,9 +3657,6 @@ static void gfx_v8_0_ring_emit_ib(struct amdgpu_ring *ring,
3657 if (ring->type == AMDGPU_RING_TYPE_COMPUTE) 3657 if (ring->type == AMDGPU_RING_TYPE_COMPUTE)
3658 control |= INDIRECT_BUFFER_VALID; 3658 control |= INDIRECT_BUFFER_VALID;
3659 3659
3660 if (ib->flush_hdp_writefifo)
3661 next_rptr += 7;
3662
3663 if (ring->need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX) 3660 if (ring->need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX)
3664 next_rptr += 2; 3661 next_rptr += 2;
3665 3662
@@ -3670,9 +3667,6 @@ static void gfx_v8_0_ring_emit_ib(struct amdgpu_ring *ring,
3670 amdgpu_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xffffffff); 3667 amdgpu_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xffffffff);
3671 amdgpu_ring_write(ring, next_rptr); 3668 amdgpu_ring_write(ring, next_rptr);
3672 3669
3673 if (ib->flush_hdp_writefifo)
3674 gfx_v8_0_hdp_flush_cp_ring_emit(ring);
3675
3676 /* insert SWITCH_BUFFER packet before first IB in the ring frame */ 3670 /* insert SWITCH_BUFFER packet before first IB in the ring frame */
3677 if (ring->need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX) { 3671 if (ring->need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX) {
3678 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); 3672 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
@@ -4149,6 +4143,7 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_gfx = {
4149 .emit_semaphore = gfx_v8_0_ring_emit_semaphore, 4143 .emit_semaphore = gfx_v8_0_ring_emit_semaphore,
4150 .emit_vm_flush = gfx_v8_0_ring_emit_vm_flush, 4144 .emit_vm_flush = gfx_v8_0_ring_emit_vm_flush,
4151 .emit_gds_switch = gfx_v8_0_ring_emit_gds_switch, 4145 .emit_gds_switch = gfx_v8_0_ring_emit_gds_switch,
4146 .emit_hdp_flush = gfx_v8_0_ring_emit_hdp_flush,
4152 .test_ring = gfx_v8_0_ring_test_ring, 4147 .test_ring = gfx_v8_0_ring_test_ring,
4153 .test_ib = gfx_v8_0_ring_test_ib, 4148 .test_ib = gfx_v8_0_ring_test_ib,
4154 .is_lockup = gfx_v8_0_ring_is_lockup, 4149 .is_lockup = gfx_v8_0_ring_is_lockup,