diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 19 |
1 files changed, 2 insertions, 17 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index e4d209b5c879..5a2e4d5a5bd1 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | |||
@@ -6230,19 +6230,6 @@ static void gfx_v8_0_ring_emit_vgt_flush(struct amdgpu_ring *ring) | |||
6230 | EVENT_INDEX(0)); | 6230 | EVENT_INDEX(0)); |
6231 | } | 6231 | } |
6232 | 6232 | ||
6233 | |||
6234 | static void gfx_v8_0_ring_emit_hdp_invalidate(struct amdgpu_ring *ring) | ||
6235 | { | ||
6236 | amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); | ||
6237 | amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | | ||
6238 | WRITE_DATA_DST_SEL(0) | | ||
6239 | WR_CONFIRM)); | ||
6240 | amdgpu_ring_write(ring, mmHDP_DEBUG0); | ||
6241 | amdgpu_ring_write(ring, 0); | ||
6242 | amdgpu_ring_write(ring, 1); | ||
6243 | |||
6244 | } | ||
6245 | |||
6246 | static void gfx_v8_0_ring_emit_ib_gfx(struct amdgpu_ring *ring, | 6233 | static void gfx_v8_0_ring_emit_ib_gfx(struct amdgpu_ring *ring, |
6247 | struct amdgpu_ib *ib, | 6234 | struct amdgpu_ib *ib, |
6248 | unsigned vmid, bool ctx_switch) | 6235 | unsigned vmid, bool ctx_switch) |
@@ -6887,7 +6874,6 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_gfx = { | |||
6887 | .emit_vm_flush = gfx_v8_0_ring_emit_vm_flush, | 6874 | .emit_vm_flush = gfx_v8_0_ring_emit_vm_flush, |
6888 | .emit_gds_switch = gfx_v8_0_ring_emit_gds_switch, | 6875 | .emit_gds_switch = gfx_v8_0_ring_emit_gds_switch, |
6889 | .emit_hdp_flush = gfx_v8_0_ring_emit_hdp_flush, | 6876 | .emit_hdp_flush = gfx_v8_0_ring_emit_hdp_flush, |
6890 | .emit_hdp_invalidate = gfx_v8_0_ring_emit_hdp_invalidate, | ||
6891 | .test_ring = gfx_v8_0_ring_test_ring, | 6877 | .test_ring = gfx_v8_0_ring_test_ring, |
6892 | .test_ib = gfx_v8_0_ring_test_ib, | 6878 | .test_ib = gfx_v8_0_ring_test_ib, |
6893 | .insert_nop = amdgpu_ring_insert_nop, | 6879 | .insert_nop = amdgpu_ring_insert_nop, |
@@ -6910,7 +6896,7 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = { | |||
6910 | .emit_frame_size = | 6896 | .emit_frame_size = |
6911 | 20 + /* gfx_v8_0_ring_emit_gds_switch */ | 6897 | 20 + /* gfx_v8_0_ring_emit_gds_switch */ |
6912 | 7 + /* gfx_v8_0_ring_emit_hdp_flush */ | 6898 | 7 + /* gfx_v8_0_ring_emit_hdp_flush */ |
6913 | 5 + /* gfx_v8_0_ring_emit_hdp_invalidate */ | 6899 | 5 + /* hdp_invalidate */ |
6914 | 7 + /* gfx_v8_0_ring_emit_pipeline_sync */ | 6900 | 7 + /* gfx_v8_0_ring_emit_pipeline_sync */ |
6915 | VI_FLUSH_GPU_TLB_NUM_WREG * 5 + 7 + /* gfx_v8_0_ring_emit_vm_flush */ | 6901 | VI_FLUSH_GPU_TLB_NUM_WREG * 5 + 7 + /* gfx_v8_0_ring_emit_vm_flush */ |
6916 | 7 + 7 + 7, /* gfx_v8_0_ring_emit_fence_compute x3 for user fence, vm fence */ | 6902 | 7 + 7 + 7, /* gfx_v8_0_ring_emit_fence_compute x3 for user fence, vm fence */ |
@@ -6921,7 +6907,6 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = { | |||
6921 | .emit_vm_flush = gfx_v8_0_ring_emit_vm_flush, | 6907 | .emit_vm_flush = gfx_v8_0_ring_emit_vm_flush, |
6922 | .emit_gds_switch = gfx_v8_0_ring_emit_gds_switch, | 6908 | .emit_gds_switch = gfx_v8_0_ring_emit_gds_switch, |
6923 | .emit_hdp_flush = gfx_v8_0_ring_emit_hdp_flush, | 6909 | .emit_hdp_flush = gfx_v8_0_ring_emit_hdp_flush, |
6924 | .emit_hdp_invalidate = gfx_v8_0_ring_emit_hdp_invalidate, | ||
6925 | .test_ring = gfx_v8_0_ring_test_ring, | 6910 | .test_ring = gfx_v8_0_ring_test_ring, |
6926 | .test_ib = gfx_v8_0_ring_test_ib, | 6911 | .test_ib = gfx_v8_0_ring_test_ib, |
6927 | .insert_nop = amdgpu_ring_insert_nop, | 6912 | .insert_nop = amdgpu_ring_insert_nop, |
@@ -6941,7 +6926,7 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_kiq = { | |||
6941 | .emit_frame_size = | 6926 | .emit_frame_size = |
6942 | 20 + /* gfx_v8_0_ring_emit_gds_switch */ | 6927 | 20 + /* gfx_v8_0_ring_emit_gds_switch */ |
6943 | 7 + /* gfx_v8_0_ring_emit_hdp_flush */ | 6928 | 7 + /* gfx_v8_0_ring_emit_hdp_flush */ |
6944 | 5 + /* gfx_v8_0_ring_emit_hdp_invalidate */ | 6929 | 5 + /* hdp_invalidate */ |
6945 | 7 + /* gfx_v8_0_ring_emit_pipeline_sync */ | 6930 | 7 + /* gfx_v8_0_ring_emit_pipeline_sync */ |
6946 | 17 + /* gfx_v8_0_ring_emit_vm_flush */ | 6931 | 17 + /* gfx_v8_0_ring_emit_vm_flush */ |
6947 | 7 + 7 + 7, /* gfx_v8_0_ring_emit_fence_kiq x3 for user fence, vm fence */ | 6932 | 7 + 7 + 7, /* gfx_v8_0_ring_emit_fence_kiq x3 for user fence, vm fence */ |