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path: root/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
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Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c11
1 files changed, 3 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index cec46ebae5f7..855b5272f4b5 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -2366,14 +2366,14 @@ static int gfx_v7_0_ring_test_ring(struct amdgpu_ring *ring)
2366} 2366}
2367 2367
2368/** 2368/**
2369 * gfx_v7_0_hdp_flush_cp_ring_emit - emit an hdp flush on the cp 2369 * gfx_v7_0_ring_emit_hdp - emit an hdp flush on the cp
2370 * 2370 *
2371 * @adev: amdgpu_device pointer 2371 * @adev: amdgpu_device pointer
2372 * @ridx: amdgpu ring index 2372 * @ridx: amdgpu ring index
2373 * 2373 *
2374 * Emits an hdp flush on the cp. 2374 * Emits an hdp flush on the cp.
2375 */ 2375 */
2376static void gfx_v7_0_hdp_flush_cp_ring_emit(struct amdgpu_ring *ring) 2376static void gfx_v7_0_ring_emit_hdp_flush(struct amdgpu_ring *ring)
2377{ 2377{
2378 u32 ref_and_mask; 2378 u32 ref_and_mask;
2379 2379
@@ -2528,9 +2528,6 @@ static void gfx_v7_0_ring_emit_ib(struct amdgpu_ring *ring,
2528 if (ring->type == AMDGPU_RING_TYPE_COMPUTE) 2528 if (ring->type == AMDGPU_RING_TYPE_COMPUTE)
2529 control |= INDIRECT_BUFFER_VALID; 2529 control |= INDIRECT_BUFFER_VALID;
2530 2530
2531 if (ib->flush_hdp_writefifo)
2532 next_rptr += 7;
2533
2534 if (ring->need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX) 2531 if (ring->need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX)
2535 next_rptr += 2; 2532 next_rptr += 2;
2536 2533
@@ -2541,9 +2538,6 @@ static void gfx_v7_0_ring_emit_ib(struct amdgpu_ring *ring,
2541 amdgpu_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xffffffff); 2538 amdgpu_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xffffffff);
2542 amdgpu_ring_write(ring, next_rptr); 2539 amdgpu_ring_write(ring, next_rptr);
2543 2540
2544 if (ib->flush_hdp_writefifo)
2545 gfx_v7_0_hdp_flush_cp_ring_emit(ring);
2546
2547 /* insert SWITCH_BUFFER packet before first IB in the ring frame */ 2541 /* insert SWITCH_BUFFER packet before first IB in the ring frame */
2548 if (ring->need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX) { 2542 if (ring->need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX) {
2549 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); 2543 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
@@ -5522,6 +5516,7 @@ static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_gfx = {
5522 .emit_semaphore = gfx_v7_0_ring_emit_semaphore, 5516 .emit_semaphore = gfx_v7_0_ring_emit_semaphore,
5523 .emit_vm_flush = gfx_v7_0_ring_emit_vm_flush, 5517 .emit_vm_flush = gfx_v7_0_ring_emit_vm_flush,
5524 .emit_gds_switch = gfx_v7_0_ring_emit_gds_switch, 5518 .emit_gds_switch = gfx_v7_0_ring_emit_gds_switch,
5519 .emit_hdp_flush = gfx_v7_0_ring_emit_hdp_flush,
5525 .test_ring = gfx_v7_0_ring_test_ring, 5520 .test_ring = gfx_v7_0_ring_test_ring,
5526 .test_ib = gfx_v7_0_ring_test_ib, 5521 .test_ib = gfx_v7_0_ring_test_ib,
5527 .is_lockup = gfx_v7_0_ring_is_lockup, 5522 .is_lockup = gfx_v7_0_ring_is_lockup,