1 files changed, 9 insertions, 9 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 83d94c23aa78..4b5109bfd5f4 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -2252,7 +2252,7 @@ static void gfx_v7_0_ring_emit_fence_compute(struct amdgpu_ring *ring,
  */
 static void gfx_v7_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
                                       struct amdgpu_ib *ib,
-                                      unsigned vm_id, bool ctx_switch)
+                                      unsigned vmid, bool ctx_switch)
 {
         u32 header, control = 0;
 
@@ -2267,7 +2267,7 @@ static void gfx_v7_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
         else
                 header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);
 
-        control |= ib->length_dw | (vm_id << 24);
+        control |= ib->length_dw | (vmid << 24);
 
         amdgpu_ring_write(ring, header);
         amdgpu_ring_write(ring,
@@ -2281,9 +2281,9 @@ static void gfx_v7_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
 
 static void gfx_v7_0_ring_emit_ib_compute(struct amdgpu_ring *ring,
                                           struct amdgpu_ib *ib,
-                                          unsigned vm_id, bool ctx_switch)
+                                          unsigned vmid, bool ctx_switch)
 {
-        u32 control = INDIRECT_BUFFER_VALID | ib->length_dw | (vm_id << 24);
+        u32 control = INDIRECT_BUFFER_VALID | ib->length_dw | (vmid << 24);
 
         amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));
         amdgpu_ring_write(ring,
@@ -3237,19 +3237,19 @@ static void gfx_v7_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)
  * using the CP (CIK).
  */
 static void gfx_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
-                                        unsigned vm_id, uint64_t pd_addr)
+                                        unsigned vmid, uint64_t pd_addr)
 {
         int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);
 
         amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
         amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) |
                                  WRITE_DATA_DST_SEL(0)));
-        if (vm_id < 8) {
+        if (vmid < 8) {
                 amdgpu_ring_write(ring,
-                                  (mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + vm_id));
+                                  (mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + vmid));
         } else {
                 amdgpu_ring_write(ring,
-                                  (mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + vm_id - 8));
+                                  (mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + vmid - 8));
         }
         amdgpu_ring_write(ring, 0);
         amdgpu_ring_write(ring, pd_addr >> 12);
@@ -3260,7 +3260,7 @@ static void gfx_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
                                  WRITE_DATA_DST_SEL(0)));
         amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST);
         amdgpu_ring_write(ring, 0);
-        amdgpu_ring_write(ring, 1 << vm_id);
+        amdgpu_ring_write(ring, 1 << vmid);
 
         /* wait for the invalidate to complete */
         amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));