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path: root/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
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Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c28
1 files changed, 19 insertions, 9 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index 5b25c26fa30e..2082347a374f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
@@ -2386,7 +2386,7 @@ static int gfx_v6_0_rlc_init(struct amdgpu_device *adev)
2386 if (r) { 2386 if (r) {
2387 dev_warn(adev->dev, "(%d) create RLC sr bo failed\n", 2387 dev_warn(adev->dev, "(%d) create RLC sr bo failed\n",
2388 r); 2388 r);
2389 gfx_v6_0_rlc_fini(adev); 2389 adev->gfx.rlc.funcs->fini(adev);
2390 return r; 2390 return r;
2391 } 2391 }
2392 2392
@@ -2411,7 +2411,7 @@ static int gfx_v6_0_rlc_init(struct amdgpu_device *adev)
2411 (void **)&adev->gfx.rlc.cs_ptr); 2411 (void **)&adev->gfx.rlc.cs_ptr);
2412 if (r) { 2412 if (r) {
2413 dev_warn(adev->dev, "(%d) create RLC c bo failed\n", r); 2413 dev_warn(adev->dev, "(%d) create RLC c bo failed\n", r);
2414 gfx_v6_0_rlc_fini(adev); 2414 adev->gfx.rlc.funcs->fini(adev);
2415 return r; 2415 return r;
2416 } 2416 }
2417 2417
@@ -2532,8 +2532,8 @@ static int gfx_v6_0_rlc_resume(struct amdgpu_device *adev)
2532 if (!adev->gfx.rlc_fw) 2532 if (!adev->gfx.rlc_fw)
2533 return -EINVAL; 2533 return -EINVAL;
2534 2534
2535 gfx_v6_0_rlc_stop(adev); 2535 adev->gfx.rlc.funcs->stop(adev);
2536 gfx_v6_0_rlc_reset(adev); 2536 adev->gfx.rlc.funcs->reset(adev);
2537 gfx_v6_0_init_pg(adev); 2537 gfx_v6_0_init_pg(adev);
2538 gfx_v6_0_init_cg(adev); 2538 gfx_v6_0_init_cg(adev);
2539 2539
@@ -2561,7 +2561,7 @@ static int gfx_v6_0_rlc_resume(struct amdgpu_device *adev)
2561 WREG32(mmRLC_UCODE_ADDR, 0); 2561 WREG32(mmRLC_UCODE_ADDR, 0);
2562 2562
2563 gfx_v6_0_enable_lbpw(adev, gfx_v6_0_lbpw_supported(adev)); 2563 gfx_v6_0_enable_lbpw(adev, gfx_v6_0_lbpw_supported(adev));
2564 gfx_v6_0_rlc_start(adev); 2564 adev->gfx.rlc.funcs->start(adev);
2565 2565
2566 return 0; 2566 return 0;
2567} 2567}
@@ -3058,6 +3058,15 @@ static const struct amdgpu_gfx_funcs gfx_v6_0_gfx_funcs = {
3058 .select_me_pipe_q = &gfx_v6_0_select_me_pipe_q 3058 .select_me_pipe_q = &gfx_v6_0_select_me_pipe_q
3059}; 3059};
3060 3060
3061static const struct amdgpu_rlc_funcs gfx_v6_0_rlc_funcs = {
3062 .init = gfx_v6_0_rlc_init,
3063 .fini = gfx_v6_0_rlc_fini,
3064 .resume = gfx_v6_0_rlc_resume,
3065 .stop = gfx_v6_0_rlc_stop,
3066 .reset = gfx_v6_0_rlc_reset,
3067 .start = gfx_v6_0_rlc_start
3068};
3069
3061static int gfx_v6_0_early_init(void *handle) 3070static int gfx_v6_0_early_init(void *handle)
3062{ 3071{
3063 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 3072 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -3065,6 +3074,7 @@ static int gfx_v6_0_early_init(void *handle)
3065 adev->gfx.num_gfx_rings = GFX6_NUM_GFX_RINGS; 3074 adev->gfx.num_gfx_rings = GFX6_NUM_GFX_RINGS;
3066 adev->gfx.num_compute_rings = GFX6_NUM_COMPUTE_RINGS; 3075 adev->gfx.num_compute_rings = GFX6_NUM_COMPUTE_RINGS;
3067 adev->gfx.funcs = &gfx_v6_0_gfx_funcs; 3076 adev->gfx.funcs = &gfx_v6_0_gfx_funcs;
3077 adev->gfx.rlc.funcs = &gfx_v6_0_rlc_funcs;
3068 gfx_v6_0_set_ring_funcs(adev); 3078 gfx_v6_0_set_ring_funcs(adev);
3069 gfx_v6_0_set_irq_funcs(adev); 3079 gfx_v6_0_set_irq_funcs(adev);
3070 3080
@@ -3097,7 +3107,7 @@ static int gfx_v6_0_sw_init(void *handle)
3097 return r; 3107 return r;
3098 } 3108 }
3099 3109
3100 r = gfx_v6_0_rlc_init(adev); 3110 r = adev->gfx.rlc.funcs->init(adev);
3101 if (r) { 3111 if (r) {
3102 DRM_ERROR("Failed to init rlc BOs!\n"); 3112 DRM_ERROR("Failed to init rlc BOs!\n");
3103 return r; 3113 return r;
@@ -3148,7 +3158,7 @@ static int gfx_v6_0_sw_fini(void *handle)
3148 for (i = 0; i < adev->gfx.num_compute_rings; i++) 3158 for (i = 0; i < adev->gfx.num_compute_rings; i++)
3149 amdgpu_ring_fini(&adev->gfx.compute_ring[i]); 3159 amdgpu_ring_fini(&adev->gfx.compute_ring[i]);
3150 3160
3151 gfx_v6_0_rlc_fini(adev); 3161 adev->gfx.rlc.funcs->fini(adev);
3152 3162
3153 return 0; 3163 return 0;
3154} 3164}
@@ -3160,7 +3170,7 @@ static int gfx_v6_0_hw_init(void *handle)
3160 3170
3161 gfx_v6_0_constants_init(adev); 3171 gfx_v6_0_constants_init(adev);
3162 3172
3163 r = gfx_v6_0_rlc_resume(adev); 3173 r = adev->gfx.rlc.funcs->resume(adev);
3164 if (r) 3174 if (r)
3165 return r; 3175 return r;
3166 3176
@@ -3178,7 +3188,7 @@ static int gfx_v6_0_hw_fini(void *handle)
3178 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 3188 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
3179 3189
3180 gfx_v6_0_cp_enable(adev, false); 3190 gfx_v6_0_cp_enable(adev, false);
3181 gfx_v6_0_rlc_stop(adev); 3191 adev->gfx.rlc.funcs->stop(adev);
3182 gfx_v6_0_fini_pg(adev); 3192 gfx_v6_0_fini_pg(adev);
3183 3193
3184 return 0; 3194 return 0;