diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/cik.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/cik.c | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c index a296f7bbe57c..8ba056a2a5da 100644 --- a/drivers/gpu/drm/amd/amdgpu/cik.c +++ b/drivers/gpu/drm/amd/amdgpu/cik.c | |||
@@ -757,72 +757,72 @@ static void cik_init_golden_registers(struct amdgpu_device *adev) | |||
757 | case CHIP_BONAIRE: | 757 | case CHIP_BONAIRE: |
758 | amdgpu_program_register_sequence(adev, | 758 | amdgpu_program_register_sequence(adev, |
759 | bonaire_mgcg_cgcg_init, | 759 | bonaire_mgcg_cgcg_init, |
760 | (const u32)ARRAY_SIZE(bonaire_mgcg_cgcg_init)); | 760 | ARRAY_SIZE(bonaire_mgcg_cgcg_init)); |
761 | amdgpu_program_register_sequence(adev, | 761 | amdgpu_program_register_sequence(adev, |
762 | bonaire_golden_registers, | 762 | bonaire_golden_registers, |
763 | (const u32)ARRAY_SIZE(bonaire_golden_registers)); | 763 | ARRAY_SIZE(bonaire_golden_registers)); |
764 | amdgpu_program_register_sequence(adev, | 764 | amdgpu_program_register_sequence(adev, |
765 | bonaire_golden_common_registers, | 765 | bonaire_golden_common_registers, |
766 | (const u32)ARRAY_SIZE(bonaire_golden_common_registers)); | 766 | ARRAY_SIZE(bonaire_golden_common_registers)); |
767 | amdgpu_program_register_sequence(adev, | 767 | amdgpu_program_register_sequence(adev, |
768 | bonaire_golden_spm_registers, | 768 | bonaire_golden_spm_registers, |
769 | (const u32)ARRAY_SIZE(bonaire_golden_spm_registers)); | 769 | ARRAY_SIZE(bonaire_golden_spm_registers)); |
770 | break; | 770 | break; |
771 | case CHIP_KABINI: | 771 | case CHIP_KABINI: |
772 | amdgpu_program_register_sequence(adev, | 772 | amdgpu_program_register_sequence(adev, |
773 | kalindi_mgcg_cgcg_init, | 773 | kalindi_mgcg_cgcg_init, |
774 | (const u32)ARRAY_SIZE(kalindi_mgcg_cgcg_init)); | 774 | ARRAY_SIZE(kalindi_mgcg_cgcg_init)); |
775 | amdgpu_program_register_sequence(adev, | 775 | amdgpu_program_register_sequence(adev, |
776 | kalindi_golden_registers, | 776 | kalindi_golden_registers, |
777 | (const u32)ARRAY_SIZE(kalindi_golden_registers)); | 777 | ARRAY_SIZE(kalindi_golden_registers)); |
778 | amdgpu_program_register_sequence(adev, | 778 | amdgpu_program_register_sequence(adev, |
779 | kalindi_golden_common_registers, | 779 | kalindi_golden_common_registers, |
780 | (const u32)ARRAY_SIZE(kalindi_golden_common_registers)); | 780 | ARRAY_SIZE(kalindi_golden_common_registers)); |
781 | amdgpu_program_register_sequence(adev, | 781 | amdgpu_program_register_sequence(adev, |
782 | kalindi_golden_spm_registers, | 782 | kalindi_golden_spm_registers, |
783 | (const u32)ARRAY_SIZE(kalindi_golden_spm_registers)); | 783 | ARRAY_SIZE(kalindi_golden_spm_registers)); |
784 | break; | 784 | break; |
785 | case CHIP_MULLINS: | 785 | case CHIP_MULLINS: |
786 | amdgpu_program_register_sequence(adev, | 786 | amdgpu_program_register_sequence(adev, |
787 | kalindi_mgcg_cgcg_init, | 787 | kalindi_mgcg_cgcg_init, |
788 | (const u32)ARRAY_SIZE(kalindi_mgcg_cgcg_init)); | 788 | ARRAY_SIZE(kalindi_mgcg_cgcg_init)); |
789 | amdgpu_program_register_sequence(adev, | 789 | amdgpu_program_register_sequence(adev, |
790 | godavari_golden_registers, | 790 | godavari_golden_registers, |
791 | (const u32)ARRAY_SIZE(godavari_golden_registers)); | 791 | ARRAY_SIZE(godavari_golden_registers)); |
792 | amdgpu_program_register_sequence(adev, | 792 | amdgpu_program_register_sequence(adev, |
793 | kalindi_golden_common_registers, | 793 | kalindi_golden_common_registers, |
794 | (const u32)ARRAY_SIZE(kalindi_golden_common_registers)); | 794 | ARRAY_SIZE(kalindi_golden_common_registers)); |
795 | amdgpu_program_register_sequence(adev, | 795 | amdgpu_program_register_sequence(adev, |
796 | kalindi_golden_spm_registers, | 796 | kalindi_golden_spm_registers, |
797 | (const u32)ARRAY_SIZE(kalindi_golden_spm_registers)); | 797 | ARRAY_SIZE(kalindi_golden_spm_registers)); |
798 | break; | 798 | break; |
799 | case CHIP_KAVERI: | 799 | case CHIP_KAVERI: |
800 | amdgpu_program_register_sequence(adev, | 800 | amdgpu_program_register_sequence(adev, |
801 | spectre_mgcg_cgcg_init, | 801 | spectre_mgcg_cgcg_init, |
802 | (const u32)ARRAY_SIZE(spectre_mgcg_cgcg_init)); | 802 | ARRAY_SIZE(spectre_mgcg_cgcg_init)); |
803 | amdgpu_program_register_sequence(adev, | 803 | amdgpu_program_register_sequence(adev, |
804 | spectre_golden_registers, | 804 | spectre_golden_registers, |
805 | (const u32)ARRAY_SIZE(spectre_golden_registers)); | 805 | ARRAY_SIZE(spectre_golden_registers)); |
806 | amdgpu_program_register_sequence(adev, | 806 | amdgpu_program_register_sequence(adev, |
807 | spectre_golden_common_registers, | 807 | spectre_golden_common_registers, |
808 | (const u32)ARRAY_SIZE(spectre_golden_common_registers)); | 808 | ARRAY_SIZE(spectre_golden_common_registers)); |
809 | amdgpu_program_register_sequence(adev, | 809 | amdgpu_program_register_sequence(adev, |
810 | spectre_golden_spm_registers, | 810 | spectre_golden_spm_registers, |
811 | (const u32)ARRAY_SIZE(spectre_golden_spm_registers)); | 811 | ARRAY_SIZE(spectre_golden_spm_registers)); |
812 | break; | 812 | break; |
813 | case CHIP_HAWAII: | 813 | case CHIP_HAWAII: |
814 | amdgpu_program_register_sequence(adev, | 814 | amdgpu_program_register_sequence(adev, |
815 | hawaii_mgcg_cgcg_init, | 815 | hawaii_mgcg_cgcg_init, |
816 | (const u32)ARRAY_SIZE(hawaii_mgcg_cgcg_init)); | 816 | ARRAY_SIZE(hawaii_mgcg_cgcg_init)); |
817 | amdgpu_program_register_sequence(adev, | 817 | amdgpu_program_register_sequence(adev, |
818 | hawaii_golden_registers, | 818 | hawaii_golden_registers, |
819 | (const u32)ARRAY_SIZE(hawaii_golden_registers)); | 819 | ARRAY_SIZE(hawaii_golden_registers)); |
820 | amdgpu_program_register_sequence(adev, | 820 | amdgpu_program_register_sequence(adev, |
821 | hawaii_golden_common_registers, | 821 | hawaii_golden_common_registers, |
822 | (const u32)ARRAY_SIZE(hawaii_golden_common_registers)); | 822 | ARRAY_SIZE(hawaii_golden_common_registers)); |
823 | amdgpu_program_register_sequence(adev, | 823 | amdgpu_program_register_sequence(adev, |
824 | hawaii_golden_spm_registers, | 824 | hawaii_golden_spm_registers, |
825 | (const u32)ARRAY_SIZE(hawaii_golden_spm_registers)); | 825 | ARRAY_SIZE(hawaii_golden_spm_registers)); |
826 | break; | 826 | break; |
827 | default: | 827 | default: |
828 | break; | 828 | break; |