diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c index e8bd50cf9785..2f2a9e17fdb4 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | |||
@@ -232,7 +232,7 @@ int amdgpu_uvd_sw_init(struct amdgpu_device *adev) | |||
232 | ring = &adev->uvd.ring; | 232 | ring = &adev->uvd.ring; |
233 | rq = &ring->sched.sched_rq[AMD_SCHED_PRIORITY_NORMAL]; | 233 | rq = &ring->sched.sched_rq[AMD_SCHED_PRIORITY_NORMAL]; |
234 | r = amd_sched_entity_init(&ring->sched, &adev->uvd.entity, | 234 | r = amd_sched_entity_init(&ring->sched, &adev->uvd.entity, |
235 | rq, amdgpu_sched_jobs); | 235 | rq, amdgpu_sched_jobs, NULL); |
236 | if (r != 0) { | 236 | if (r != 0) { |
237 | DRM_ERROR("Failed setting up UVD run queue.\n"); | 237 | DRM_ERROR("Failed setting up UVD run queue.\n"); |
238 | return r; | 238 | return r; |
@@ -408,6 +408,7 @@ static u64 amdgpu_uvd_get_addr_from_ctx(struct amdgpu_uvd_cs_ctx *ctx) | |||
408 | */ | 408 | */ |
409 | static int amdgpu_uvd_cs_pass1(struct amdgpu_uvd_cs_ctx *ctx) | 409 | static int amdgpu_uvd_cs_pass1(struct amdgpu_uvd_cs_ctx *ctx) |
410 | { | 410 | { |
411 | struct ttm_operation_ctx tctx = { false, false }; | ||
411 | struct amdgpu_bo_va_mapping *mapping; | 412 | struct amdgpu_bo_va_mapping *mapping; |
412 | struct amdgpu_bo *bo; | 413 | struct amdgpu_bo *bo; |
413 | uint32_t cmd; | 414 | uint32_t cmd; |
@@ -430,7 +431,7 @@ static int amdgpu_uvd_cs_pass1(struct amdgpu_uvd_cs_ctx *ctx) | |||
430 | } | 431 | } |
431 | amdgpu_uvd_force_into_uvd_segment(bo); | 432 | amdgpu_uvd_force_into_uvd_segment(bo); |
432 | 433 | ||
433 | r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false); | 434 | r = ttm_bo_validate(&bo->tbo, &bo->placement, &tctx); |
434 | } | 435 | } |
435 | 436 | ||
436 | return r; | 437 | return r; |
@@ -949,6 +950,7 @@ int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx) | |||
949 | static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo, | 950 | static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo, |
950 | bool direct, struct dma_fence **fence) | 951 | bool direct, struct dma_fence **fence) |
951 | { | 952 | { |
953 | struct ttm_operation_ctx ctx = { true, false }; | ||
952 | struct ttm_validate_buffer tv; | 954 | struct ttm_validate_buffer tv; |
953 | struct ww_acquire_ctx ticket; | 955 | struct ww_acquire_ctx ticket; |
954 | struct list_head head; | 956 | struct list_head head; |
@@ -975,7 +977,7 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo, | |||
975 | amdgpu_uvd_force_into_uvd_segment(bo); | 977 | amdgpu_uvd_force_into_uvd_segment(bo); |
976 | } | 978 | } |
977 | 979 | ||
978 | r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false); | 980 | r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); |
979 | if (r) | 981 | if (r) |
980 | goto err; | 982 | goto err; |
981 | 983 | ||
@@ -1218,7 +1220,7 @@ int amdgpu_uvd_ring_test_ib(struct amdgpu_ring *ring, long timeout) | |||
1218 | } else if (r < 0) { | 1220 | } else if (r < 0) { |
1219 | DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r); | 1221 | DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r); |
1220 | } else { | 1222 | } else { |
1221 | DRM_INFO("ib test on ring %d succeeded\n", ring->idx); | 1223 | DRM_DEBUG("ib test on ring %d succeeded\n", ring->idx); |
1222 | r = 0; | 1224 | r = 0; |
1223 | } | 1225 | } |
1224 | 1226 | ||