diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 84 |
1 files changed, 30 insertions, 54 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c index 1fa8bc337859..7b33867036e7 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | |||
@@ -297,10 +297,7 @@ amdgpu_ucode_get_load_type(struct amdgpu_device *adev, int load_type) | |||
297 | case CHIP_POLARIS11: | 297 | case CHIP_POLARIS11: |
298 | case CHIP_POLARIS12: | 298 | case CHIP_POLARIS12: |
299 | case CHIP_VEGAM: | 299 | case CHIP_VEGAM: |
300 | if (!load_type) | 300 | return AMDGPU_FW_LOAD_SMU; |
301 | return AMDGPU_FW_LOAD_DIRECT; | ||
302 | else | ||
303 | return AMDGPU_FW_LOAD_SMU; | ||
304 | case CHIP_VEGA10: | 301 | case CHIP_VEGA10: |
305 | case CHIP_RAVEN: | 302 | case CHIP_RAVEN: |
306 | case CHIP_VEGA12: | 303 | case CHIP_VEGA12: |
@@ -423,32 +420,41 @@ static int amdgpu_ucode_patch_jt(struct amdgpu_firmware_info *ucode, | |||
423 | return 0; | 420 | return 0; |
424 | } | 421 | } |
425 | 422 | ||
426 | int amdgpu_ucode_init_bo(struct amdgpu_device *adev) | 423 | int amdgpu_ucode_create_bo(struct amdgpu_device *adev) |
427 | { | 424 | { |
428 | uint64_t fw_offset = 0; | 425 | if (adev->firmware.load_type != AMDGPU_FW_LOAD_DIRECT) { |
429 | int i, err; | 426 | amdgpu_bo_create_kernel(adev, adev->firmware.fw_size, PAGE_SIZE, |
430 | struct amdgpu_firmware_info *ucode = NULL; | 427 | amdgpu_sriov_vf(adev) ? AMDGPU_GEM_DOMAIN_VRAM : AMDGPU_GEM_DOMAIN_GTT, |
431 | const struct common_firmware_header *header = NULL; | 428 | &adev->firmware.fw_buf, |
432 | 429 | &adev->firmware.fw_buf_mc, | |
433 | if (!adev->firmware.fw_size) { | 430 | &adev->firmware.fw_buf_ptr); |
434 | dev_warn(adev->dev, "No ip firmware need to load\n"); | 431 | if (!adev->firmware.fw_buf) { |
435 | return 0; | ||
436 | } | ||
437 | |||
438 | if (!adev->in_gpu_reset) { | ||
439 | err = amdgpu_bo_create_kernel(adev, adev->firmware.fw_size, PAGE_SIZE, | ||
440 | amdgpu_sriov_vf(adev) ? AMDGPU_GEM_DOMAIN_VRAM : AMDGPU_GEM_DOMAIN_GTT, | ||
441 | &adev->firmware.fw_buf, | ||
442 | &adev->firmware.fw_buf_mc, | ||
443 | &adev->firmware.fw_buf_ptr); | ||
444 | if (err) { | ||
445 | dev_err(adev->dev, "failed to create kernel buffer for firmware.fw_buf\n"); | 432 | dev_err(adev->dev, "failed to create kernel buffer for firmware.fw_buf\n"); |
446 | goto failed; | 433 | return -ENOMEM; |
434 | } else if (amdgpu_sriov_vf(adev)) { | ||
435 | memset(adev->firmware.fw_buf_ptr, 0, adev->firmware.fw_size); | ||
447 | } | 436 | } |
448 | } | 437 | } |
438 | return 0; | ||
439 | } | ||
440 | |||
441 | void amdgpu_ucode_free_bo(struct amdgpu_device *adev) | ||
442 | { | ||
443 | if (adev->firmware.load_type != AMDGPU_FW_LOAD_DIRECT) | ||
444 | amdgpu_bo_free_kernel(&adev->firmware.fw_buf, | ||
445 | &adev->firmware.fw_buf_mc, | ||
446 | &adev->firmware.fw_buf_ptr); | ||
447 | } | ||
449 | 448 | ||
450 | memset(adev->firmware.fw_buf_ptr, 0, adev->firmware.fw_size); | 449 | int amdgpu_ucode_init_bo(struct amdgpu_device *adev) |
450 | { | ||
451 | uint64_t fw_offset = 0; | ||
452 | int i; | ||
453 | struct amdgpu_firmware_info *ucode = NULL; | ||
451 | 454 | ||
455 | /* for baremetal, the ucode is allocated in gtt, so don't need to fill the bo when reset/suspend */ | ||
456 | if (!amdgpu_sriov_vf(adev) && (adev->in_gpu_reset || adev->in_suspend)) | ||
457 | return 0; | ||
452 | /* | 458 | /* |
453 | * if SMU loaded firmware, it needn't add SMC, UVD, and VCE | 459 | * if SMU loaded firmware, it needn't add SMC, UVD, and VCE |
454 | * ucode info here | 460 | * ucode info here |
@@ -465,7 +471,6 @@ int amdgpu_ucode_init_bo(struct amdgpu_device *adev) | |||
465 | for (i = 0; i < adev->firmware.max_ucodes; i++) { | 471 | for (i = 0; i < adev->firmware.max_ucodes; i++) { |
466 | ucode = &adev->firmware.ucode[i]; | 472 | ucode = &adev->firmware.ucode[i]; |
467 | if (ucode->fw) { | 473 | if (ucode->fw) { |
468 | header = (const struct common_firmware_header *)ucode->fw->data; | ||
469 | amdgpu_ucode_init_single_fw(adev, ucode, adev->firmware.fw_buf_mc + fw_offset, | 474 | amdgpu_ucode_init_single_fw(adev, ucode, adev->firmware.fw_buf_mc + fw_offset, |
470 | adev->firmware.fw_buf_ptr + fw_offset); | 475 | adev->firmware.fw_buf_ptr + fw_offset); |
471 | if (i == AMDGPU_UCODE_ID_CP_MEC1 && | 476 | if (i == AMDGPU_UCODE_ID_CP_MEC1 && |
@@ -480,33 +485,4 @@ int amdgpu_ucode_init_bo(struct amdgpu_device *adev) | |||
480 | } | 485 | } |
481 | } | 486 | } |
482 | return 0; | 487 | return 0; |
483 | |||
484 | failed: | ||
485 | if (err) | ||
486 | adev->firmware.load_type = AMDGPU_FW_LOAD_DIRECT; | ||
487 | |||
488 | return err; | ||
489 | } | ||
490 | |||
491 | int amdgpu_ucode_fini_bo(struct amdgpu_device *adev) | ||
492 | { | ||
493 | int i; | ||
494 | struct amdgpu_firmware_info *ucode = NULL; | ||
495 | |||
496 | if (!adev->firmware.fw_size) | ||
497 | return 0; | ||
498 | |||
499 | for (i = 0; i < adev->firmware.max_ucodes; i++) { | ||
500 | ucode = &adev->firmware.ucode[i]; | ||
501 | if (ucode->fw) { | ||
502 | ucode->mc_addr = 0; | ||
503 | ucode->kaddr = NULL; | ||
504 | } | ||
505 | } | ||
506 | |||
507 | amdgpu_bo_free_kernel(&adev->firmware.fw_buf, | ||
508 | &adev->firmware.fw_buf_mc, | ||
509 | &adev->firmware.fw_buf_ptr); | ||
510 | |||
511 | return 0; | ||
512 | } | 488 | } |