1 files changed, 24 insertions, 5 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 5b39d1399630..25d2f3e757f1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -31,6 +31,7 @@
 #include "soc15_common.h"
 #include "psp_v3_1.h"
 #include "psp_v10_0.h"
+#include "psp_v11_0.h"
 
 static void psp_set_funcs(struct amdgpu_device *adev);
 
@@ -52,12 +53,14 @@ static int psp_sw_init(void *handle)
         switch (adev->asic_type) {
         case CHIP_VEGA10:
         case CHIP_VEGA12:
-        case CHIP_VEGA20:
                 psp_v3_1_set_psp_funcs(psp);
                 break;
         case CHIP_RAVEN:
                 psp_v10_0_set_psp_funcs(psp);
                 break;
+        case CHIP_VEGA20:
+                psp_v11_0_set_psp_funcs(psp);
+                break;
         default:
                 return -EINVAL;
         }
@@ -131,6 +134,13 @@ psp_cmd_submit_buf(struct psp_context *psp,
                 msleep(1);
         }
 
+        /* the status field must be 0 after FW is loaded */
+        if (ucode && psp->cmd_buf_mem->resp.status) {
+                DRM_ERROR("failed loading with status (%d) and ucode id (%d)\n",
+                          psp->cmd_buf_mem->resp.status, ucode->ucode_id);
+                return -EINVAL;
+        }
+
         if (ucode) {
                 ucode->tmr_mc_addr_lo = psp->cmd_buf_mem->resp.fw_addr_lo;
                 ucode->tmr_mc_addr_hi = psp->cmd_buf_mem->resp.fw_addr_hi;
@@ -160,7 +170,7 @@ static int psp_tmr_init(struct psp_context *psp)
          * Note: this memory need be reserved till the driver
          * uninitializes.
          */
-        ret = amdgpu_bo_create_kernel(psp->adev, 0x300000, 0x100000,
+        ret = amdgpu_bo_create_kernel(psp->adev, PSP_TMR_SIZE, 0x100000,
                                       AMDGPU_GEM_DOMAIN_VRAM,
                                       &psp->tmr_bo, &psp->tmr_mc_addr, &psp->tmr_buf);
 
@@ -176,7 +186,9 @@ static int psp_tmr_load(struct psp_context *psp)
         if (!cmd)
                 return -ENOMEM;
 
-        psp_prep_tmr_cmd_buf(cmd, psp->tmr_mc_addr, 0x300000);
+        psp_prep_tmr_cmd_buf(cmd, psp->tmr_mc_addr, PSP_TMR_SIZE);
+        DRM_INFO("reserve 0x%x from 0x%llx for PSP TMR SIZE\n",
+                        PSP_TMR_SIZE, psp->tmr_mc_addr);
 
         ret = psp_cmd_submit_buf(psp, NULL, cmd,
                                  psp->fence_buf_mc_addr, 1);
@@ -440,8 +452,6 @@ static int psp_hw_fini(void *handle)
         if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP)
                 return 0;
 
-        amdgpu_ucode_fini_bo(adev);
-
         psp_ring_destroy(psp, PSP_RING_TYPE__KM);
 
         amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, &psp->tmr_buf);
@@ -594,3 +604,12 @@ const struct amdgpu_ip_block_version psp_v10_0_ip_block =
         .rev = 0,
         .funcs = &psp_ip_funcs,
 };
+
+const struct amdgpu_ip_block_version psp_v11_0_ip_block =
+{
+        .type = AMD_IP_BLOCK_TYPE_PSP,
+        .major = 11,
+        .minor = 0,
+        .rev = 0,
+        .funcs = &psp_ip_funcs,
+};