aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c31
1 files changed, 16 insertions, 15 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index 361975cf45a9..e6e365852f11 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -1658,9 +1658,6 @@ void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev)
1658 1658
1659void amdgpu_pm_compute_clocks(struct amdgpu_device *adev) 1659void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)
1660{ 1660{
1661 struct drm_device *ddev = adev->ddev;
1662 struct drm_crtc *crtc;
1663 struct amdgpu_crtc *amdgpu_crtc;
1664 int i = 0; 1661 int i = 0;
1665 1662
1666 if (!adev->pm.dpm_enabled) 1663 if (!adev->pm.dpm_enabled)
@@ -1675,22 +1672,26 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)
1675 amdgpu_fence_wait_empty(ring); 1672 amdgpu_fence_wait_empty(ring);
1676 } 1673 }
1677 1674
1675 if (!amdgpu_device_has_dc_support(adev)) {
1676 mutex_lock(&adev->pm.mutex);
1677 amdgpu_dpm_get_active_displays(adev);
1678 adev->pm.pm_display_cfg.num_display = adev->pm.dpm.new_active_crtcs;
1679 adev->pm.pm_display_cfg.vrefresh = amdgpu_dpm_get_vrefresh(adev);
1680 adev->pm.pm_display_cfg.min_vblank_time = amdgpu_dpm_get_vblank_time(adev);
1681 /* we have issues with mclk switching with refresh rates over 120 hz on the non-DC code. */
1682 if (adev->pm.pm_display_cfg.vrefresh > 120)
1683 adev->pm.pm_display_cfg.min_vblank_time = 0;
1684 if (adev->powerplay.pp_funcs->display_configuration_change)
1685 adev->powerplay.pp_funcs->display_configuration_change(
1686 adev->powerplay.pp_handle,
1687 &adev->pm.pm_display_cfg);
1688 mutex_unlock(&adev->pm.mutex);
1689 }
1690
1678 if (adev->powerplay.pp_funcs->dispatch_tasks) { 1691 if (adev->powerplay.pp_funcs->dispatch_tasks) {
1679 amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_DISPLAY_CONFIG_CHANGE, NULL); 1692 amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_DISPLAY_CONFIG_CHANGE, NULL);
1680 } else { 1693 } else {
1681 mutex_lock(&adev->pm.mutex); 1694 mutex_lock(&adev->pm.mutex);
1682 adev->pm.dpm.new_active_crtcs = 0;
1683 adev->pm.dpm.new_active_crtc_count = 0;
1684 if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) {
1685 list_for_each_entry(crtc,
1686 &ddev->mode_config.crtc_list, head) {
1687 amdgpu_crtc = to_amdgpu_crtc(crtc);
1688 if (amdgpu_crtc->enabled) {
1689 adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id);
1690 adev->pm.dpm.new_active_crtc_count++;
1691 }
1692 }
1693 }
1694 /* update battery/ac status */ 1695 /* update battery/ac status */
1695 if (power_supply_is_system_supplied() > 0) 1696 if (power_supply_is_system_supplied() > 0)
1696 adev->pm.dpm.ac_power = true; 1697 adev->pm.dpm.ac_power = true;